Hewlett-packard Company

Anthony C Barkans

David L McAllister

Bryan G Prouty

Ian A Elliott

Roger W Swanson

Lawrence G Mahoney

A method and apparatus for generating a mask identifying a number of subpixels that are covered by a primitive includes the process of apportioning an image, comprising a plurality of scan lines into a plurality of sub-scan lines, such that a number of sub-scan lines crosses each pixel. A sample point is placed on at least one of the sub-scan lines. To determine the number of samples that are covered by a primitive, edge stepping is used to step along each edge of the primitive, generating a sub-scan line coordinate for the edge. The edge stepping hardware is used for stepping either on a sub-scan line granularity, for operation in anti-aliased mode, or on a scan line granularity, for operation in aliased mode. In anti-aliased mode, as each edge sub-scan line coordinate is generated, it is compared against the coordinates of a sample point on that sub-scan line, to determine whether or not that sample point is covered by the primitive. A mask is generated for each pixel, with each bit of the mask corresponding to one of the sub-scan line samples. A bit in the mask is set if the subsample is covered by the primitive. Thus, a mask representing covered subsamples is provided by using incremental techniques to approximate pixel coverage without the complex hardware and lookup tables used in the prior art.

Method and apparatus for providing polygon pixel sub-sample information

An antialiasing system is implemented in a graphics system of a computer. A memory control is associated with graphics system for controlling a frame buffer. The antialiasing system is situated in the memory control and is configured to receive from steppers (edge and span) new color values and new depth dimensions z at a plurality of subpixel locations. In turn, the antialiasing system analyzes color data pertaining to each pixel in the frame buffer, and if necessary, updates the color data. The color data is unique and minimizes memory requirements and accesses. Specifically, the color data includes a current display value that corresponds to the pixel, a reference color value that corresponds to one subpixel location, a reference depth dimension that corresponds with the one subpixel location, and reconstruction indicia that correspond with other subpixel locations and that can be utilized to derive respective depth dimensions and colors for the other subpixel locations. The reconstruction indicia include a hint and a depth dimension difference. The hint indicates color informationm, and the depth dimension difference represents a difference between the reference depth dimension and a respective depth dimension.

Antialiasing system and method that minimize memory requirements and

A color graphics pipeline has a separate encoder with a dither table for processing each color value in pixel data received from a host processor or rasterizer. The encoders modify color values and dither noise values and also combine both positive and negative dither noise values with the color values, for independent optimization of each color and for better edge detection in a color recovery filter within a decoder of the pipeline. Each encoder comprises the following elements. A comparator mechanism compares a color value with a predetermined cutoff value. A dither table provides dither noise values. An offset mechanism modifies the dither noise values to derive a modified dither noise value when the color value is greater than or equal to the predetermined cutoff value. An aliasing mechanism aliases the color value with other color values below the predetermined cutoff value to derive an aliased color value when the color value is less than the predetermined cutoff value. An adder mechanism adds the unmodified dither noise or modified dither noise to the aliased color value or nonaliased color value, respectively, to derive the dithered color value. A clamping mechanism ensures that the dithered color value resides within a predetermined color range. Finally, a quantizing mechanism quantizes the dithered color value to derive a quantized/dithered color value for storage in memory, such as in a frame buffer.

System and method for dithering and quantizing image data to optimize

Color information lost in a computer graphics system as a result of encoding by dithering is recovered by passing the encoded data through a filter that has the same effective shape and size as the dither matrix used to encode the data. In a system that employs a dither matrix having 2.sup.N cells, up to N bits of color information, per color component, is recoverable.

Method and apparatus for improved color recovery in a computer graphics

A color/texture interpolator (CTI) for use in rendering antialiased vectors in a computer graphics system comprises: an x-stepper circuit for receiving input data defining a vector to be rendered and generating respective pixel addresses of pixels composing the vector; a filter memory for storing predetermined filter values addressed according to the vector's minor axis subpixel addresses and slope; and a color interpolator for generating a color value for each pixel composing the vector.

Apparatus for rendering antialiased vectors

First next and second next pixel locations are selected simultaneously from among adjacent pixel locations and represent a straight line segment defined by two end locations and having a slope of one or less. An initialization process uses the .DELTA.X and .DELTA.Y of the desired line segment to find various constants, including an initial error term, an error term increment, an error term decrement, an error term double increment, an error term double decrement, and an error term increment-then-decrement. These represent, respectively, an increment in the X location without an increment to the Y location (a step S), an increment in the X location and an increment in the Y location (a jump J), a step followed by a step (two steps SS), two jumps (JJ), and either of a step-then-jump or a jump-then-step (SJ/JS). These five operations correspond to the only possible locations that might be selected, given any starting location. Of the five operations, exactly one of the first two will be for the first next location, while exactly one of the last three will be for the second next location. The present error term is an input to three different adders. Another input to each of the adders is one of the constants for S or J and two of the constants for SS, JJ and SJ/JS. The three additions proceed simultaneously. The initial error term and the resulting three trial error terms can be inspected in relation to error term limits. When the Bresenham Algorithm is implemented, these comparisons are simple determinations of sign. A logic circuit responsive to the error term inspection indicates which combination of the operations S and J correspond to the desired path. A corresponding frame buffer operation code is sent to the a frame buffer address controller. Once the selection is made the error term value for the selected second next pixel location is captured and made to be the error term input for the adders, and the process is ready to select another two pixel locations. If .DELTA.X is an odd number then the second next position is not needed for the final sequence of frame buffer operation codes, and it to be suppressed.

Method and apparatus for simultaneously selecting a plurality of pixels

A technique of processing pipeline commands in parallel so as to minimize pipeline stalls. This is accomplished in accordance with the invention without need for the complex resource allocation techniques of the prior art by arbitrating access to critical pipeline resources on the phase of the system clock. For example, one control process may access the critical pipeline resource only during an even phase of the system clock, while a second control process may access the critical pipeline resource only during the odd phase of the clock. These processes may run at the same time if the pipelined instructions being executed by each process have no data dependencies since structural hazards are effectively eliminated by time-sharing the data buses on the respective phases of the system clock. The benefits of dynamically scheduled pipelined systems may thus be obtained without the complex scoreboarding and other scheduling algorithms used in the prior art to prevent pipeline hazards.

Allocation of resources of a pipelined processor by clock phase for

A scan conversion algorithm for rendering antialiased vectors in a multi-processor graphics system comprises the following steps: providing signals to the processors indicative of scan lines the respective processors are responsible for, determining a first set of storage pixels to be rendered by the processors, rendering such storage pixel of the first set simultaneously, each by a different processor, determining a second set of storage pixels to be rendered, and rendering each of the second set of storage pixels substantially simultaneously by a different one of the processors. The determinations of the first and second sets of storage pixels are made in accordance with the signals indicative of scan lines for which the respective processors are responsible.

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Fort Collins, CO, United States of America

Anthony C Barkans