Dell Products Inc.

Dell USA L P

Anthony B Armstrong

Matthew Bruce Mendelow

Brian Todd Zucker

David Scott Springer

Gary S Kitten

Scott Allen Dickey

An apparatus and method are presented for dynamically disabling a first audio input/output ('I/O') connector when an audio I/O device is coupled to a second audio I/O connector, locating the disablement point to reduce significantly any spurious noise coupled onto the primary audio I/O connector and its associated electrical components and cabling. An advantage is that it can be implemented with components that provide low resistance from the first audio I/O connector to ground, thoroughly grounding, and significantly reducing spurious noise coupled onto, the first audio I/O connector and associated electronics and cabling. This invention therefore also significantly reduces the spurious noise processed with, and therefore interfering with, the signal associated with a device coupled to a second audio I/O connector, significantly increasing the quality of the input or output signal from that secondary device. Another advantage is that the components required are relatively inexpensive and can be purchased in single units.

Mechanism to disable dynamically a computer audio input/output connector

In a computer system, a passive component minimization of connector pins configuration includes a motherboard and daughterboard. The daughterboard includes a selection switch coupled via passive components to a single connector pin, according to a prescribed state of multiple states of the daughterboard. In one embodiment, the passive components include three series connected resistors collectively coupled to the daughterboard connector pin. The motherboard includes a supply voltage and pull-up resistor circuit coupled to a single connector pin, and further includes decoding circuitry coupled to the motherboard connector pin for decoding a voltage level of the motherboard connector pin into binary data. Responsive to a mating of the daughterboard connector pin with the motherboard connector pin, the decoding circuitry converts voltage level data present at the motherboard connector pin into binary data representative of a current state of the daughterboard as a function of the selection switch and passive components of the daughterboard.

Method and apparatus for passive component minimization of connector pins in a computer system

Use of a variable voltage supply to clamp a diode for shunting signal glitches is described. Clamping the diode to a variable voltage supply enables forward-biasing of the diode, thereby preparing the diode for the glitch and effectively reducing the diode's turn-on time. The voltage of the variable voltage supply is determined by the size of the clamping diode used and the magnitude of the glitch it is designed to shunt. In one embodiment, the variable voltage supply is a temperature compensated voltage supply, such that as the temperature, and hence, the capacitance, of the diode changes, the value of the variable voltage supply also changes accordingly.

Method for termination of signal lines with discrete biased diodes

A computer system is disclosed which includes at least one microprocessor having an L2 cache, at least one memory, and basic input output system (BIOS) firmware. The L2 cache includes error checking and correcting capability (ECC). The at least one memory includes either all ECC capable memory or any combination of ECC capable and non-ECC capable memory. Lastly, the basic input output system (BIOS) firmware includes an L2 cache support feature. The L2 cache support feature includes three user-selectable options, the three options including i) L2 cache ECC ON, ii) L2 cache ECC OFF, and iii) L2 cache AUTO. Selection of L2 cache ECC ON is for enabling L2 cache ECC. Selection of L2 cache ECC OFF is for not enabling L2 cache ECC. Lastly, selection of L2 cache ECC AUTO is for automatically enabling or not enabling L2 cache ECC in response to a detection of the presence of a) all ECC capable memory or b) any combination of ECC and non-ECC capable memory, respectively. Accordingly, an optimal reliability or an optimal performance can be automatically assured.

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Round Rock, TX, United States of America

Anthony B Armstrong