Applied Materials, Inc.

Anshul Vyas

Avgerinos V Gelatos

Bo Zheng

Raymond Hoiman Hung

Binbin Wang

Liem Ferryanto

Ravi C Edupuganti

Bayesian inference and modeling techniques, along with model decomposition may be used to improve mismatch performances in semiconductor processing devices by identifying sources of intrinsic and extrinsic variations in performance. A network of causal relationships between processes and hardware in a semiconductor processing device may be accessed to generate a first Bayesian model for a first semiconductor processing device using the causal relationships in the network and performance data. A second Bayesian model may also be generated for a second semiconductor processing device using the causal relationships in the network and associated performance data. Response distributions generated by the first Bayesian model and the second Bayesian model may be compared to determine whether a performance of the of the first semiconductor processing device matches a performance of the second semiconductor processing device by decomposing the model transfer functions to identify the effects of intrinsic/extrinsic variables.

Bayesian decomposition for mismatched performances in semiconductor equipment

A method of detecting failure causes in semiconductor processing systems may include receiving an indication of a failure in a semiconductor processing system and providing the indication of the failure as a query to a network representing the semiconductor processing system. The network may include nodes representing on-wafer effects and component functions, and relationships between the nodes that represent causal dependencies between the component functions and the on-wafer effects. The method may also include calculating a change in probabilities assigned to nodes representing the component functions resulting from the query, and generating an output indicating a probability of at least one of the component functions as a cause of the failure.

Model-based failure mitigation for semiconductor processing systems

The present disclosure generally relates to methods for removing contaminants and native oxides from substrate surfaces. The method includes exposing a surface of the substrate to first hydrogen radical species, wherein the substrate is silicon germanium having a concentration of germanium above about 30%, then exposing the surface of the substrate to a plasma formed from a fluorine-containing precursor and a hydrogen-containing precursor, and then exposing the surface of the substrate to second hydrogen radical species.

Pre-clean of silicon germanium for pre-metal contact at source and drain and pre-high K at channel

Pre-clean of silicon germanium for pre-metal contact at source and drain and pre-high k at channel

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Milpitas, CA, United States of America

Anshul Vyas