Imec

Imec Vzw

Katholieke Universiteit Leuven, Ku Leuven R&d

Renesas Technology Corp.

Asm International N.v.

Renesas Electronics Corporation

Katholieke Universiteit Leuven

Annelies Delabie

Matty Caymax

Markus Heyne

Jan Willem Maes

Johan Swerts

Paul A Zimmerman

Silvia Armini

Lars-Ake Ragnarsson

Roel Gronheid

Stefan De Gendt

Christoph Adelmann

Sven Van Elshocht

Ming Zhao

Yasuhiro Shimamoto

Gustaf Winroth

Yashuhiro Shimamoto

Ana Martin Hoyas

Paul Zimmerman

A method for manufacturing a semiconductor structure that comprises providing a monocrystalline silicon base layer comprising a first region for manufacturing the III-N semiconductor device and a second region for manufacturing the silicon semiconductor device; providing on the monocrystalline silicon base layer a mask layer, the mask layer being interrupted, in the first region, by a recess in the monocrystalline silicon base layer, wherein the mask layer comprises a 2D material; forming, selectively, a layer of gamma-AlOat the bottom of the recess by a first growth process; forming, selectively on the layer of gamma-AlO, a III-N semiconductor device stack by a second growth process, and thereafter; manufacturing, in the second region, at least partially a silicon semiconductor device.

Method of manufacturing a semiconductor structure

Embodiments described herein include a method for forming a vertical hetero-stack and a device including a vertical hetero-stack. An example method is used to form a vertical hetero-stack of a first nanostructure and a second nanostructure arranged on an upper surface of the first nanostructure. The first nanostructure is formed by a first transition metal dichalcogenide, TMDC, material and the second nanostructure is formed by a second TMDC material. The example method includes providing the first nanostructure on a substrate. The method also includes forming a reactive layer of molecules on the first nanostructure along a periphery of the upper surface. The method further includes forming the second nanostructure by a vapor deposition process. The second TMDC material nucleates on the reactive layer of molecules along the periphery and grows laterally therefrom to form the second nanostructure on the upper surface.

Method for forming a vertical hetero-stack and a device including a vertical hetero-stack

Method of producing one or more transition metal dichalcogenide (MX) layers on a substrate, comprising the steps of: obtaining a substrate having a surface and depositing MXon the surface using ALD deposition, starting from a metal halide precursor and a chalcogen source (HX), at a deposition temperature of about 300&#xb0; C. Suitable metals are Mo and W, suitable chalcogenides are S, Se and Te. The substrate may be (111) oriented. Also mixtures of two or more MXlayers of different compositions can be deposited on the substrate, by repeating at least some of the steps of the method.

Method of producing transition metal dichalcogenide layer

A method is provided for forming a feature of a target material on a substrate. The method including:

Method of forming a feature of a target material on a substrate

In one aspect, a method is disclosed that includes providing a substrate having a topography that comprises a relief and providing an anti-reflective film conformally over the substrate using a molecular layer deposition step. The anti-reflective film may be formed of a compound selected from the group consisting of: (i) an organic compound chemically bound to an inorganic compound, where one of the organic compound and the inorganic compound is bound to the substrate and where the organic compound absorbs light at at least one wavelength selected in the range 150-500 nm, or (ii) a monodisperse organic compound absorbing light at at least one wavelength selected in the range 150-500 nm. The method further includes providing a photoresist layer on the anti-reflective film.

Conformal anti-reflective coating

A Si or Ge semi-conductor substrate includes an oxygen monolayer on a surface thereof. The oxygen monolayer can be fractional or complete. A Sior Geoxidation state of the surface of the Si or Ge substrate, respectively, resulting from the presence of the oxygen monolayer represents less than 50%, preferably less than 40% and more preferably less than 30% of the sum of Si, Si, Siand Sioxidation states or the sum of Ge, Ge, Geand Geoxidation states, respectively, as measured by XPS.

Oxygen monolayer on a semiconductor

A method for forming a noble metal layer by Plasma Enhanced Atomic Layer Deposition (PE-ALD) is disclosed. The method includes providing a substrate in a PE-ALD chamber, the substrate comprising a first region having an exposed first material and a second region having an exposed second material. The first material comprises a metal nitride or a nitridable metal, and the second material comprises a non-nitridable metal or silicon oxide. The method further includes depositing selectively by PE-ALD a noble metal layer on the second region and not on the first region, by repeatedly performing a deposition cycle including (a) supplying a noble metal precursor to the PE-ALD chamber and contacting the noble metal precursor with the substrate in the presence of a carrier gas followed by purging the noble metal precursor, and (b) exposing the substrate to plasma while supplying ammonia and the carrier gas into the PE-ALD chamber.

Method for selectively depositing noble metals on metal/metal nitride substrates

One inventive aspect is related to an atomic layer deposition (ALD) method comprising:

Atomic layer deposition (ALD) method and reactor for producing a high quality layer

The present invention relates generally to integrated circuit (IC) fabrication processes. The present invention relates more particularly to the treatment of surfaces, such as silicon dioxide or silicon oxynitride layers, for the subsequent deposition of a metal, metal oxide, metal nitride and/or metal carbide layer. The present invention further relates to a high-k gate obtainable by a method of the invention.

Method to enhance the initiation of film growth

The invention is related to an ALD method for depositing a layer including the steps of a) providing a semiconductor substrate in a reactor; b) providing a pulse of a first precursor gas into the reactor; c) providing a pulse of a second precursor gas into the reactor; d) providing an inert atmosphere in the reactor; and e) repeating step b) through step d), wherein at least once during step d) the semiconductor substrate is exposed to UV irradiation.

Growing community of inventors

Bierbeek, Belgium

Annelies Delabie