Atmel Corporation

Anne Lafage

Eric Matulik

Nicolas Rescanieres

The invention comprises a system for reducing inactive periods in an integrated circuit. The integrated circuit is coupled to an external peripheral by an external data bus. The integrated circuit has a processor coupled to an internal data bus. The system comprises the following. An external bus circuit is coupled to the internal and external data busses. The bus interface circuit is configured to receive read and write signals for data request data. In response, the bus interfaces circuit transmits a wait signal until data from the external peripheral is available on the internal data bus. The wait signal indicates that the external and internal data busses are not available for other purposes. After the processor has received or transmits the data, the bus interface circuit stops transmitting the wait signal and transmits a busy signal. The busy signal indicates that the internal data bus is available and the external data bus is not available for other purposes.

Growing community of inventors

Aix en Provence, France

Anne Lafage