Intel Corporation

Apple Inc.

Ankit Sharma

Jaydeep P Kulkarni

Farhana Sheikh

Pramod Kolar

Karthik Subramanian

Wei-Hsiang Ma

Subho Chatterjee

A calculation circuit for calculating a transform of an input sequence may include a plurality of butterfly computation circuits configured to perform a plurality of butterfly computations and to produce a plurality of outputs during each of a plurality of computation stages, a wired routing network configured to route a first plurality of outputs of the plurality of butterfly computation circuits from a first computation stage of the plurality of computation stages as input to the plurality of butterfly computation circuits during a second computation stage of the plurality of computation stages according to a reconfigurable routing configuration, and routing control circuitry configured to modify the reconfigurable routing configuration for a third computation stage of the plurality of computation stages.

Fast Fourier transform architecture

In some embodiments, disclosed is a wordline boosting technique using a self-timed capacitive charge boosting approach.

Capacitive wordline boosting

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Hillsboro, OR, United States of America

Ankit Sharma