Sandisk Technologies Inc.

Ankit Rehani

V S N K Chaitanya G

Pradeep Anantula

Venkata Nittala

A stage-based frequency optimization for a charge pump achieves a higher area efficiency by operating different stages of the charge pump at their optimized frequency simultaneously, instead of single common frequency, to obtain greater output strength. A first set of stages uses triple well devices as transfer switches and operates at a first, higher frequency. The first stages supply a second set of stages using high voltage devices as transfer switches and operates at a second, lower frequency. The two set of stages are connected through a frequency transition circuit.

Stage based frequency optimization for area reduction of charge pumps

A hybrid charge pump is disclosed that employs novel arrangements of depletion-mode n-channel semiconductor devices and enhancement-mode p-channel semiconductor devices that eliminate or otherwise substantially reduce voltage drops that would otherwise occur across semiconductor device arrangements in existing charge pumps. As a result, the hybrid charge pump disclosed herein achieves the same output voltages as conventional charge pumps while requiring a reduced physical die area. Additionally, a hybrid charge pump arrangement disclosed herein employs a novel clocking scheme that reduces or eliminates reverse currents in the hybrid charge pump arrangement.

Generating boosted voltages with a hybrid charge pump

A charge pump includes first and second multiplier stages including first and second capacitor in series with an input node, a final multiplier stage including an output capacitor in series with the second capacitor and an output node, and pre-charge circuitry. The pre-charge circuitry is configured to charge the output capacitor to a first level during an initial phase of a charging operation, wherein the first level is equal to a supply voltage of the data storage system, and decouple a charging path of the pre-charge circuitry from the output capacitor in response to the output capacitor being charged to the first level. The first and second multiplier stages are configured to increase the charge of the output capacitor to second and third levels higher than the first level during second and third phases of the charging operation.

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Bengaluru, India

Ankit Rehani