Mentor Graphics Corporation

Ankit Garg

Deepak Kumar Garg

John R Stickley

Sanjay Gupta

Suresh Krishnamurthy

Ronald James Squiers

Saurabh Khaitan

Russell Elias Vreeland, Iii

Georges Antoun Elias Ghattas

Hanan Mohamed Sameh Tawfik

Abdallah Galal Yahya Khalil

A system for verifying networking system-on-chip designs comprises a reconfigurable hardware modeling device programmed to implement circuitry hardware models and a traffic generation device communicating with the reconfigurable hardware modeling device. The circuitry hardware models comprise a hardware model of a circuit design and a hardware model of interface circuitry. The system employs a backpressure flow control independent of the communication protocol, which can cause the traffic generation device to suspend sending messages when one or more message buffers in the traffic generation device, the reconfigurable hardware modeling device, or both cannot accept more messages based on predetermined conditions.

Flow control in networking system-on-chip verification

This application discloses a computing system having a virtual machine and a host program that communicate via a virtual interface. The virtual machine can generate a data packet for transmission to the host program via the virtual interface. The virtual machine can receive a saturation signal generated by a virtual interface driver in the virtual interface. The virtual interface driver can be configured to populate a virtual buffer in the virtual interface with the data packet. The virtual machine can determine an availability of resources in the virtual buffer to store the data packet based, at least in part, on the saturation signal, and selectively stall transmission of the data packet to the host program based, at least in part, on the saturation signal. The host program can bypass a hypervisor in the computing system to directly access the virtual buffer in the virtual interface.

Back-pressure in virtual machine interface

Growing community of inventors

Noida, India

Ankit Garg