At&t Bell Laboratories

Anjur S Krishnakumar

Krishan Kumar Sabnani

Prathima Agrawal

Mostafa Hashem Sherif

Bala Krishnamurthy

William J Dally

An arrangement for implementing graph operations, generally, and circuit simulations in particular employing a plurality of substantially identical high speed special purpose processing elements (PE) that are flexibly interconnected through a switch to form a cluster. In addition to the processing element (PE) being programmable, the interconnection switch permits dynamically altered routing of signals between the processing elements. The processing elements include a queue unit which permits high speed asynchronous communication between the elements. Additional advantage is attained with a hierarchical arrangement where a plurality of clusters are interconnected in an n-cube arrangement, and all of the clusters communicate with a host computer.

Programmable processing elements interconnected by a communication

In a programmable protocol engine, a core central processor implements a plurality of programmable finite state machines that perform context-dependent operations, and programmable satellite processing units that perform context-free operations. To assist in buffering the two way communications of the protocol engine, a memory is included which interacts with the central processor and the satellite units. The programmability of the protocol engine is achieved by realizing the satellite units with combinations of a processing unit and a memory unit which stores the instructions to be performed by the corresponding processing unit. The sequence of instructions to be performed is drawn from a small unique set of instructions which are adapted particularly to the tasks associated with protocol implementations. Instruction ports are provided for loading the necessary instructions to the satellite units and the central processor, thereby implementing a chosen protocol. To permit use of the protocol engine in environments where a plurality of users are multiplexed onto a single physical link, additional means are provided for storing the state of the finite state machines within the central processor, and for restoring the finite state machines to a previously stored set of states.

Programmable protocol engine having context free and context dependent

A method and apparatus is disclosed for determining an objective measure of performance of an extended finite state machine. Many modern complex systems, for example, computer communications protocols and computer or machine user interfaces, can be represented as extended finite state machines. A formal description of the extended finite state machine is employed to obtain a canonical form description. The canomical form description, combined with a service description, is used to generate a list of canocial state transitions transited by the extended finite state machine to perform the service. From this list, an objective measurement of performance, e.g., the time required to perform a particular service, is obtained. This objective measurement may then be used as desired, for example, to select an optimum extended finite state machine from a plurality of extended finite state machines.

Growing community of inventors

Warren, NJ, United States of America

Anjur S Krishnakumar