International Business Machines Corporation

Globalfoundries Inc.

Anjali R Malladi

Ram Kelkar

Kai D Feng

Pradeep Thiagarajan

Ramana Murty Malladi

Herschel Akiba Ainspan

Hayden C Cranford, Jr

Martin L Schmatz

Anthony Richard Bonaccio

Todd Morgan Rasmus

Stephen Dale Wyatt

Zhenrong Jin

Christopher Ro

Nina A Shah

Embodiments of the present invention provide a design structure and method for compensating for a change in frequency of oscillation (FOO) of an LC-tank VCO that includes a first node; second node; inductor; first capacitive network (FCN) that allows the design structure to obtain a target FOO; compensating capacitive (CCN) network that compensates for a change in the design structure's FOO; second capacitive network (SCN) that allows the design structure to obtain a desired FOO; a filter that supplies a voltage to the SCN and is coupled to the SCN; a transconductor that compensates for a change in the design structure's FOO; and a sub-circuit coupled to the SCN that generates and supplies voltage to the CCN sufficient to allow the CCN to compensate for a reduction in the design structure's FOO. The first and second nodes are coupled to the inductor, FCN, CCN, SCN, and sub-circuit.

Structure for an inductor-capacitor voltage-controlled oscillator

An approach for a transconductance cell for use in a voltage controlled oscillator (VCO) is provided. The transconductance cell includes a first NFET stack connected in series to a first PFET stack. The transconductance cell includes a second NFET stack connected in series to a second PFET stack. The first NFET stack and the first PFET stack are cross-coupled to the second NFET stack and the second PFET stack. The first NFET stack and the second NFET stack are connected to a tail node. The first PFET stack and the second PFET stack are connected to a power supply node.

Phase noise reduction in LC-VCO

A ramp generator circuit for generating sawtooth waveforms based on a clock signal may include an operational amplifier, a first switched capacitor device within a first feedback path of the operational amplifier, and a first plurality of switch devices within the first feedback path, whereby upon actuation of the first plurality of switches, the first switched capacitor generates first ramp waveforms during first alternate clock periods of the clock signal. The circuit may also include a second switched capacitor device within a second feedback path of the operational amplifier, and a second plurality of switch devices within the second feedback path, whereby upon actuation of the second plurality of switches, the second switched capacitor generates second ramp waveforms during second alternate clock periods of the clock signal. The first alternate clock periods of the clock are followed by an adjacent one of the second alternate clock periods of the clock.

Ramp generator using operational amplifier based integration and switched capacitor techniques

An improved programmable duty cycle generator and method of operation. In one aspect, the generated output signal duty cycle is not measured, but rather is generated based on a predetermined value. Saw tooth generator/Integrator schemes are used to create the saw type waveforms of the incoming frequency which in conjunction with DAC is used to create the desired duty cycle. The improved programmable duty cycle signal generator for placement in key pinch points of a critical path where precise duty cycle definition is needed.

Programmable duty cycle setter employing time to voltage domain referenced pulse creation

Circuits and methods for automated real-time tuning of wide range frequency/delay voltage controlled oscillators (VCO) using a reset mechanism, to account for run-time variations such as power supply, temperature, reference clock frequency and input slew drift etc is described. It finds extensive applications in wide range, multi frequency band phase and delay locked loops. In one embodiment, an automated Jump-Down band switching structure and method for use in VCOs with a plurality of frequency bands is described. This involves monitoring the VCO's analog control voltage signal until it reaches a predetermined lower limit, at which time band switching to an overlapping lower frequency band is triggered by an internally generated reset signal, while simultaneously charging the analog control voltage to a limit in a pre-determined range of the lower band, to avoid phase detector malfunctions in the PLL/DLL system at lower control voltages during band switch.

Automated tuning in wide range multi-band VCO with internal reset concept

A current controlled, phase locked loop device includes a phase detector configured to compare a reference frequency to an output frequency of a current controlled oscillator (ICO), a charge pump coupled to the phase detector and a low pass filter coupled to the charge pump. A voltage to current (V to I) converter is coupled to the low pass filter, providing an output current for integral control of the ICO. A control circuit is coupled to the ICO, and receives increment and decrement outputs of the phase detector, wherein the control circuit is configured to provide proportional control of the ICO through an amount of bias current applied thereto.

Current controlled oscillation device and method having wide frequency range

An oscillation circuit and the method for operating the same. The circuit includes (a) an LC oscillator including an inductor and a variable capacitor; (b) first and second differentially-coupled transistors (i) electrically coupled to the LC oscillator and (ii) configured to provide negative resistance to the LC oscillator; and (c) a first current-injecting circuit (i) electrically coupled to the first differentially-coupled transistor and (ii) configured to inject a first additional electric current into the first differentially-coupled transistor so as to cause the first differentially-coupled transistor to create a first additional negative resistance to the LC oscillator; and (d) a second current-injecting circuit (i) electrically coupled to the second differentially-coupled transistor and (ii) configured to inject a second additional electric current into the second differentially-coupled transistor so as to cause the second differentially-coupled transistor to create a second additional negative resistance to the LC oscillator.

Negative resistance oscillator with additional bias current injection

A design structure embodied in a machine readable medium used in a design process includes a current controlled, phase locked loop device having a phase detector configured to compare a reference frequency to an output frequency of a current controlled oscillator (ICO), a charge pump coupled to the phase detector and a low pass filter coupled to the charge pump. A voltage to current (V to I) converter is coupled to the low pass filter, providing an output current for integral control of the ICO. A control circuit is coupled to the ICO, and receives increment and decrement outputs of the phase detector, wherein the control circuit is configured to provide proportional control of the ICO through an amount of bias current applied thereto.

Design structure for improved current controlled oscillation device and method having wide frequency range

A design structure for an integrated circuit including a phase-locked loop (PLL) circuit responsive to a voltage controlled oscillator (VCO) frequency band selection circuit that provides automatic frequency band selection in real time to account for run-time variations, such as power supply and temperature variations over time. The PLL includes a charge pump and an LC tank circuit that provides the automatic frequency band selection based on a VCO control voltage signal supplied by the charge pump.

Design structure for an automated real-time frequency band selection circuit for use with a voltage controlled oscillator

An integrated circuit including a phase-locked loop (PLL) circuit responsive to a voltage controlled oscillator (VCO) frequency band selection circuit that provides automatic frequency band selection in real time to account for run-time variations, such as power supply and temperature variations over time. The PLL includes a charge pump and an LC tank circuit that provides the automatic frequency band selection based on a VCO control voltage signal supplied by the charge pump.

Real-time frequency band selection circuit for use with a voltage controlled oscillator

The invention comprises a phase locked loop that has an input adapted to receive a reference frequency. A phase detector is connected directly to the input, a charge pump is connected directly to the phase detector, and a loop filter is connected directly to the charge pump. Also, a voltage controlled oscillator is connected directly to the loop filter, and is adapted to perform frequency band selection. A band selection circuit is connected to the voltage controlled oscillator.

Fast VCO band selection by frequency to voltage converter

A circuit apparatus and method for generating multiphase clocks in a delay lock loop (DLL) at sub-picosecond granularity. The circuit and method of the invention involves locking a number of cycles M in an N stage DLL, e.g., M cycles, where M is an prime number, which results in clock edges in each cycle that are not located at the same phase locations in each of the M cycles. Any of the phase locations from any of the cycles can be used to generate a clock edge for all cycle in the system application. This requires a special technique to 'lock' the DLL loop over a M cycle period instead of a one cycle period. The benefit is that it improves the clock placement granularity by a factor of M over the previous art.

Sub-picosecond multiphase clock generator

Jitter method and control circuit for a circuit block in a transceiver system having a phase lock loop circuit which includes an oscillator, a charge pump connected to the oscillator to add or subtract charge to or from said oscillator, and a low pass filter connected to said charge pump are provided. Circuitry is connected to the output of the oscillator and the input of the charge pump to control the amount of charge added to or subtracted from the charge pump to control the bandwidth output by the oscillator and thereby reduce jitter in the phase lock circuit.

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Williston, VT, United States of America

Anjali R Malladi