Intel Corporation

Other

Anisur Rahman

Walid M Hafez

Chia-Hong Jan

Zhanping Chen

Sangwoo Pae

Chetan Prasad

Reginald Eze

Jie-Feng Lin

Sunil Kumar

An apparatus includes a first device with a metal gate and a drain well that experiences a series resistance that drops a drain contact voltage from 10 V to 4-6 V at a junction between the drain well and a channel under the gate. The apparatus includes an interlayer dielectric layer (ILD) disposed above and on the drain well and a salicide drain contact in the drain well. The apparatus also includes a subsequent device that is located in a region different from the first device that operates at a voltage lower than the first device.

High-voltage transistor architectures, processes of forming same, and systems containing same

An apparatus includes a first device with a metal gate and a drain well that experiences a series resistance that drops a drain contact voltage from 10 V to 4-6 V at a junction between the drain well and a channel under the gate. The apparatus includes an interlayer dielectric layer (ILD0) disposed above and on the drain well and a salicide drain contact in the drain well. The apparatus also includes a subsequent device that is located in a region different from the first device that operates at a voltage lower than the first device.

A non-volatile storage element and a method of forming the storage element. The non-volatile storage element comprises: a first electrode including a first material having a first work function; a second electrode including a second material having a second work function higher than the first work function; a first dielectric disposed between the first electrode and the second electrode, the first dielectric having a first bandgap; a second dielectric disposed between the first dielectric and the second electrode, the second dielectric having a second bandgap wider than the first bandgap and being disposed such that a quantum well is created in the first dielectric; and a third dielectric disposed between the first electrode and the first dielectric, the third dielectric being thinner than the second dielectric and having a third bandgap wider than the first bandgap.

Non-volatile storage element having dual work-function electrodes

Techniques and circuitry are disclosed for implementing non-volatile storage that exploit bias temperature instability (BTI) effects of high-k/metal-gate n-type or p-type metal oxide semiconductor (NMOS or PMOS) transistors. A programmed bitcell of, for example, a memory or programmable logic circuit exhibits a threshold voltage shift resulting from an applied programming bias used to program bitcells. In some cases, applying a first programming bias causes the device to have a first state, and applying a second programming bias causes the device to have a second state that is different than the first state. Programmed bitcells can be erased by applying an opposite polarity stress, and re-programmed through multiple cycles. The bitcell configuration can be used in conjunction with column/row select circuitry and/or readout circuitry, in accordance with some embodiments.

Programmable/re-programmable device in high-k metal gate MOS

Memory cell using BTI effects in high-k metal gate MOS

A programmable anti-fuse element includes a substrate (), an N-well () in the substrate, an electrically insulating layer () over the N-well, and a gate electrode () over the electrically insulating layer. The gate electrode has n-type doping so that the N-well is able to substantially contain within its boundaries a current generated following a programming event of the programmable anti-fuse element. In the same or another embodiment, a twice-programmable fuse element () includes a metal gate fuse () and an oxide anti-fuse () such as the programmable anti-fuse element just described.

Method of forming programmable anti-fuse element

A novel optical sensor is used for monitoring the thickness of deposited thin film in real time. The sensor operates on the basic principle of a Fabry-Perot interferometer. A MEMS based design is used to fabricate the optical fiber sensor. Detail analytical results provide the theoretical model based on the Fabry-Perot interferometer, and show that the optical fiber sensor can successfully monitor and measure the thickness of deposited thin-film in real time. Since thin-film will be deposited simultaneously on both surfaces of sensor head and targeted silicon wafer, the sensor can be used in the fabrication of IC and MEMS devices, as well as in proteomics, nano-sensors, and biosensors.

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Hillsboro, OR, United States of America

Anisur Rahman