Qualcomm Incorporated

Anish Muttreja

Ravi Jenkal

Edgar Marti-Arbona

Gordon Lee

Matthew Levi Severson

Ronald Alton

Gordon P Lee

Marko Harry Koski

Kevin Bowles

Prashanth Kumar Kakkireni

Marko Koski

Kevin Bradley Citterelle

A method and apparatuses for power regulation using an extended current limit are disclosed. The power regulator detects an occurrence of an output current of the regulator exceeding a first current limit, triggers an extended current limit timer based on the detected occurrence, regulates the output current according to a second current limit higher than the first current limit based on a duration of the extended current limit timer, and regulates the output current according to the first current limit based on an expiration of the duration of the extended current limit timer.

Methods and apparatuses for extended current limit for power regulation

Various embodiments include power management system methods including receiving, at a processor(s), a notification signal triggering the processor(s) to implement power usage mitigation at the processor(s), determining, by the processor(s), a mitigation amount of power rail power by which to mitigate current usage at a power rail based on a use case for the power rail, and implementing power usage mitigation at the processor(s) by the processor(s) sufficient to mitigate power usage at the power rail by the mitigation amount of power rail power. Power usage mitigation may include reducing processor(s) current usage: by a predefined amount; proportional to the amount a power rail current exceeds a power rail current threshold; by the amount of current exceeding a processor current threshold; or by a smallest amount between the amount a power rail current exceeds a power rail current threshold and the processor(s) current exceeds a processor current threshold.

Extended power threshold management of power rails

A system is provided that controls the clocking of a processor depending upon its usage of execution units. As the processor transitions from a default mode of operation using a default number of the execution units to an increased load mode of operation using an increased number of the execution units, a current drawn by the processor from a power rail remains substantially unchanged.

Processor load step balancing

Growing community of inventors

Denver, CO, United States of America

Anish Muttreja