Sun Microsystems, Inc.

N Microsystems, Inc.

Aninda K Roy

Claude R Gauthier

Brian W Amick

Dean Liu

Samudyatha Suryanarayana

Pradeep R Trivedi

Gajendra Prasad Singh

Vipul Y Parikh

Disclosed are novel methods and apparatus for efficiently providing equalization in single-ended chip-to-chip communication. In an embodiment, a method of adjusting signal levels to provide improved communication between a sender device and a receiver device is disclosed. The method includes providing a plurality of voltage dividers. The plurality of voltage dividers may be coupled to each other to provide a reference voltage to the receiver device. The method further includes providing a storage device to store previously received data by the receiver device and providing a controller to selectively activate the plurality of voltage dividers.

Methods and apparatus for equalization in single-ended chip-to-chip communication

Input/output data transmission between a transmitting integrated circuit and a receiving integrated circuit requires a clock domain synchronizer to synchronize incoming data aligned to a clock signal of the transmitting integrated circuit to a clock signal of the receiving integrated circuit. During a start-up routine, the clock domain synchronizer propagates a pre-determined pattern of data bits through a first circuit path designed to reduce or eliminate metastability. During a normal operations mode, the clock domain synchronizer synchronizes the data signal to the clock signal of the receiving integrated circuit through a second circuit path.

Fully stable clock domain synchronization technique for input/output data transmission

The present invention is an apparatus and method for increasing the amount of data on a transmission path on a printed circuit board. Conventional methods allow only one data signal to be transmitted on the transmission path. The present invention uses multiple transmitters to modulate multiple data signals to form multiple modulated signals. The modulated signals are transmitted, possibly simultaneously, on the transmission path to receivers configured to demodulate individual modulated signals and recover the original data signals.

Simultaneous multi-band transmission on a printed circuit board

An input/output interface is used to transmit data between a transmitting circuit and a receiving circuit. Selectively during both system startup and system operation, a known bit pattern transmitted by the transmitting circuit is compared to a received bit pattern. The received bit pattern may be seen at the receiving circuit or a voltage regulator that is used to control the power supply level of the input/output interface. Dependent on the comparison of the known bit pattern and the received bit pattern, a bit error rate across the input/output interface is determined, in response to which the voltage regulator adjusts the power supply level of the input/output interface.

Dynamic calibration of I/O power supply level

A Mobile Subscriber Directory Assistance (MSDA) system including originating carrier center initiating a directory assistance call, a directory assistance center providing a directory assistance service, and a search environment. The search environment includes an aggregated pointer database and at least one directory number resolution database. A caller requesting a telephone number is connected to a directory assistance service center where search criteria for the requested number are taken. The requested number is identified by searching the aggregated pointer database and the directory number resolution database. The caller is connected to the identified telephone number without releasing this identified telephone number.

Method and apparatus for receiver circuit tuning

A method and apparatus for adjusting a frequency characteristic of a signal is provided. A transmitter circuit uses a driver circuit and a filter to generate the signal. The frequency characteristic of the signal is adjusted, or 'equalized,' using a replica driver that adjusts the driver circuit and a voltage control circuit that adjusts the filter.

Impedance controlled transmitter with adaptive compensation for chip-to-chip communication

A communication system comprising transmitting circuitry arranged to transmit a data signal and a timing signal; and receiving circuitry arranged to receive the data signal and the timing signal. The receiving circuitry comprises a first finite impulse response filter arranged to generate a filtered timing signal dependent on the timing signal and a at least one mixer signal; a decision feedback circuit arranged to generate the at least one mixer signal dependent on the filtered timing signal and a calibration signal; and a second finite impulse response filter arranged to generate a filtered data signal dependent on the data signal and the at least one mixer signal.

Receiver-side adaptive equalization in source-synchronous chip-to-chip communication systems

A technique for incorporating power information in a register transfer level design involves defining a module representing an integrated circuit block having its own power grid. The integrated circuit block, when in a power off mode effectuated by a deactivation of a clock signal to the integrated circuit, uses a device dependent on a power grid of an adjoining integrated circuit block to preserve output information from the integrated circuit block to the adjoining integrated circuit block.

Technique for incorporating power information in register transfer logic design

A method and apparatus for enlarging data eyes in a wireline communication system involves pre-coding a data signal before transmission to generate a constant frequency characteristic independent of a state of the pre-coded data signal. The receiving circuit includes a circuit that temporally expands at least a portion of the pre-coded data signal. The portion of the temporally expanded data signal is latched by the receiving circuit.

Technique to enlarge data eyes in wireline communication systems

An apparatus for canceling an effect of power supply resonance is provided. The effect of power supply resonance is a variation in power supply voltage potential. This variation may substantially affect an output buffer by causing the output buffer's output to sag below desired values. A voltage regulating circuit is coupled to power supply lines local to the output buffer where the voltage regulating circuit is most effective in reducing voltage potential variation. An exemplary voltage regulating circuit is provided that uses charge-pumped capacitors to raise the power supply voltage potential when it falls below a desired value. A second example of a voltage regulating circuit uses charge-pumped capacitors to lower the power supply voltage potential when it rises above a desired value.

I/O resonance cancellation circuit based on charge-pumped capacitors

A technique for adjusting a communication system involves a link, where the link includes a data line arranged to transmit a data signal and a clock line adapted to transmit a clock signal. The technique uses one or more counters to test the transmission across the link. Dependent on one or more of these counters, a test circuit, connected to the link, compares a known test pattern signal to a latched test pattern signal transmitted on the data line. The test circuit includes an adjustment circuit arranged to generate an adjustable clock signal from the clock signal, where the adjustable clock signal determines when to latch the transmitted test pattern signal The test circuit adjusts a timing of the adjustable clock signal relative to the data signal of the link.

Updating high speed parallel I/O interfaces based on counters

A data transmission update technique for use in a low power mode and/or a low activity mode of a computer system or a portion thereof is provided. When in the low power mode and/or the low activity mode, the technique initiates a testing of data transmissions, the results of which are used to adjust the timing of data receipt such that accurate and timely date communications are facilitated.

Data transmission update technique in low power modes

A method for quantifying effects of resonance in an integrated circuit's power distribution network is provided. The power distribution network includes a first power supply line and a second power supply line to provide power to the integrated circuit. Test ranges are selected for two test parameters, reference voltage potential of a receiver and data transmission frequency of the integrated circuit. At each combination of the two test parameters, bit patterns are transmitted by the integrated circuit to the receiver. A comparison is made between the transmitted bits and the received bits to determine whether the transmitted bits were correctly received. The comparison may be used to determine and report a range of values for the reference voltage potential and data transmission frequency that allow the transmitted bits to be correctly received.

Method for quantifying I/O chip/package resonance

A technique for adjusting a communication system involves a plurality of links where each link includes a data line adapted to transmit a data signal and a clock line adapted to transmit a clock signal. A test circuit connects to the plurality of links where the test circuit tests at least one of the plurality of links. The test circuit includes an adjustment circuit arranged to generate an adjustable clock signal from the clock signal of the one of the plurality of links based on an offset where the adjustment circuit adjusts a timing of the adjustable clock signal relative to the data signal of the one of the plurality of links. The test circuit is adapted to perform a round-robin testing of the plurality of the links.

Round-robin updating for high speed I/O parallel interfaces

A system and method of adjusting a sense amplifier to compensate for the process-type of the sense amplifier includes determining a process-type of the sense amplifier. An amplification control parameter is provided to the sense amplifier. The amplification control parameter is adjusted to adjust the sense amplifier according to the process-type of the sense amplifier.

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Hillsboro, OR, United States of America

Aninda K Roy