Intel Corporation

Animesh Manna

Susanta Bhattacharjee

Madhav Singh Chauhan

Mahesh Kumar

Uma Shankar

Vandita Kulkarni

A number of frames may be transferred in one frame period to a display panel followed by at least one frame period during which no frame is transferred. During this link idle time, the display panel continues to work on the transferred frames. However, the link and/or graphics processor may be powered down during this time to reduce power consumption.

Reducing power consumption when transferring frames from graphics processors to display panels

If the picture complexity is low then the number of pixels in a frame may be reduced. For example, pixel-to-pixel variation in terms of RGB color values can be used to determine the complexity of the frame. Frames can be characterized, in one embodiment, as non-complex frames with less pixel variation and complex frames with very high pixel variation. The high PPI may be used only for complex frames while non-complex frames can use low PPI. This method reduces memory fetching and pixel processing within the display engine and thereby saves power.

Frame complexity based dynamic PPI for displays

Methods and apparatus relating to techniques to provide dynamic pixel density adjustment for display panels not driven by backlight are described. In an embodiment, logic causes a first plurality of pixels of a display panel to be turned off in response to an indication that a charge level of a power supply, coupled to supply electrical power to the display panel, has dropped below a threshold level. The display panel is not backlight drive (such as an OLED or QDOT display panels. Other embodiments are also disclosed and claimed.

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Bengaluru, India

Animesh Manna