International Business Machines Corporation

International Business Corporation

Anilkumar Chinuprasad Bhatt

Voya Rista Markovich

Kostas I Papathomas

Allen Frederick Moring

Thomas R Miller

Jerome J Wagner

William E Wilson

Ashwinkumar C Bhatt

David John Russell

Roy H Magnuson

Donald Herman Glatzel

John M Lauffer

Gerald Walter Jones

Joseph Alphonse Kotylo

James Paul Walsh

Konstantinos I Papathomas

Irving Memis

John Joseph Konrad

Edmond Otto Fey

Edward Lee Arrington

Nageshwer Rao Bantu

Donald E Doran

Carlos Juan Sambucetti

Douglas Oliver Powell

William John Rudik

Stephen L Tisdale

Amit Kumar Sarkhel

John A Welsh

Timothy Leroy Wells

Stephen Joseph Fuerniss

Andrew Michael Seman

James W Fuller, Jr

Jeffrey McKeveny

Kevin Taylor Knadle

Subahu Dhirubhai Desai

Robert Jeffrey Day

Jose A Rios

Robert J Owen

James A Shurtleff

Terry D Sinclair

Gary S Ksenak

James W Knight

Anaya Kumar Vardya

Claude Louis Bertin

William R Tonti

Michael A Gaynes

William Louis Brodsky

Mark Vincent Pierson

George Frederick Walker

Erik L Hedberg

Benson Chan

Bernd Karl Appelt

Jerzy Maria Zalesinski

William E Bernier

David Erle Houser

Anthony P Ingraham

Ross William Keesler

Michael Wozniak

Paul A Totta

Jeffrey Alan Knight

Francis Joseph Downes, Jr

Thomas P Duffy

Jaynal Abedin Molla

Michael J Canestaro

Robert Lee Lewis

Warren A Alpaugh

Robert Douglas Edwards

Michael James Cummings

Richard Stuart Zarr

Kristen Ann Stauffer

Bernd Karl-Heinz Appelt

Richard William Malek

Nikhil Mohan Murdeshwar

Paul Joseph Hart

Michael J Cibulsky

Joseph J Van Horn

Joseph J Sniezek

Richard Gerald Murphy

George L Andrews

Richard G Armant

Donald M Egleton

Frederick M Ortloff

Michael T Freeman

Narendra G Shah

John E Larrabee

Lawrence J Hugaboom

Leo E Hunsinger

George John Saxenmeyer, Jr

Leo Raymond Buda

Bette Jaye Whalen

An organic solvent is separated from a waste stream containing supercritical CO, an organic solvent and etchant contaminants. The process includes separating the supercritical COby subjecting the waste stream to elevated temperature and/or reduced pressure to thereby obtain a first composition containing the supercritical COand a second composition containing the organic solvent and being substantially free of the supercritical CO; and then removing non-volatile etching contaminants from the second stream search as by at least one of the following:

Method for recovering an organic solvent from a waste stream containing supercritical CO2

A method of fabricating a printed circuit device including an electrically insulating substrate, and first, second, and third sets of conductors formed on a top surface of the substrate is disclosed. The method includes forming an oxide layer on the set of second conductors; forming a solder mask on the oxide layer; forming a composite layer on the first set of conductors; and forming a solder layer on at least a portion of the third set of conductors.

Method of fabricating printed circuit board with mixed metallurgy pads

A printed circuit board for use in an electronic device package such as a ball grid array package or organic chip carrier package. This printed circuit board includes a glass-free dielectric for separating and insulating power cores, circuitry or plated through holes from each other to prevent shorts caused by a migration of conductive material along glass-based prepreg substrates.

Printed circuit boards for electronic device packages having glass free non-conductive layers and method of forming same

Via holes are formed in an electrically conductive power plane. Photo-imageable dielectric (PID) material is applied to one side of the power plane filling the via holes. The power plane side with no PID material is exposed to light energy to cure the PID material in the via holes. A developer is used to remove any uncured PID material. Signal plane assemblies comprising a conductive signal plane and a dielectric layer are laminated onto the filled power plane forming a two signal and one power plane (2S1P) structure. In another embodiment, the power plane has PID material applied from both sides. A photo-mask is applied to the power plane and the PID material in the via holes is cured with light energy. A developer is used to remove uncured PID material. Signal plane assemblies, as described above, are laminated onto the filled power plane forming a 2S1P structure.

Printed wiring board

A method for forming a dielectric structure. A first layer is formed, wherein the first layer includes a first fully cured photoimageable dielectric (PID) material. A sticker lays is nonadhesively formed on the first layer, wherein the sticker layer includes a partially cured PID material. A second layer is nonadhesively formed on the sticker layer, wherein the second layer includes a second fully cured PID material, wherein the sticker layer is nonadhesively sandwiched between the first layer and the second layer such that the sticker layer is in non-adhesive contact with the first layer and in non-adhesive contact with the second layer, and wherein the sticker layer is capable of remaining in non-adhesive contact with the first layer and the second layer until the sticker layer is subsequently subjected to additional curing.

Dielectric structure and method of formation

The present invention provides a printed circuit board and a method for the production of a printed circuit board having fine-line circuitry and greater aspect ratio on a subcomposite with plated through holes. A method provides for additive plating on a subcomposite having filled plated through holes. Fine-line circuitry is achieved via electroless deposition onto a dielectric substrate after the through hole is plated and filled. Fine-line circuitry may be routed over landless, plated through holes thereby increasing the aspect ratio and the available surface area for additional components and wiring.

Full additive process with filled plated through holes

Method for making a printed wiring board

Printed circuit board with mixed metallurgy pads and method of fabrication

A blind via structure, and associated laser ablation methods of formation, that includes a blind via within a photoimageable dielectric (PID) layer on a substrate, such that the sidewall of the blind via makes an obtuse angle with the blind end of the blind via. The obtuse-angled sidewall may be formed by executing two processes in sequence. In the first process, photoimaging of the PID layer, with selective exposure to ultraviolet light, results in one or more blind vias having acute-angled sidewalls. The photoimaging cross links the PID material that had been selectively exposed to ultraviolet light such that a subsequent developing step removes PID material not cross linked, or weakly cross linked, to simultaneously form multiple blind vias having different sized openings. In the second process, laser ablation is selectively employed to remove the acute-angled sidewalls from particular blind vias in a way that forms replacement obtuse-angled sidewalls in the laser-ablated blind vias. Alternatively, the first process involving photoimaging may be omitted such that the second step involving laser ablation forms the entire obtuse-angled blind via. The resultant blind via structure includes at least one blind via having an obtuse-angled sidewall, and optionally, at least one blind via having an acute-angled sidewall.

Blind via formation in a photoimageable dielectric material

A dielectric structure, wherein two fully cured photoimageable dielectric (PID) layers of the structure are nonadhesively interfaced by a partially cured PID layer. The partially cured PID layer includes a power plane sandwiched between a first partially cured PID sheet and a second partially cured PID sheet. The fully cured PID layers each include an internal power plane, a plated via having a blind end conductively coupled to the internal power plane, and a plated via passing through the fully cured PID layer. The dielectric structure may further include a first PID film partially cured and nonadhesively coupled to one of the fully cured PID layers. The dialectric structure may further include a second PID film partially cured and nonadhesively coupled to the other fully cured PID layer.

A method for conductively filling a hole or via disposed in an electronic package to provide a structure having a lower coefficient of thermal expansion. After fabricating a through hole or a plated through hole in an electronic package, the hole or via is filled with metal, and the surface of the electronic package is sealed.

Method of filling plated through holes

Circuit boards are manufactured by forming a substrate with a dielectric surface and laminating a metal foil onto the substrate. The metal foil is patterned to form a first wiring layer. A permanent photoimagable dielectric layer is formed over the wiring layer and via holes are formed through the dielectric layer over pads and conductors of the wiring layer. Holes are formed through the substrate and substrate surfaces including the photoimagable dielectric, walls of the via holes, and walls of the through holes subjected to an electroless copper plating process. The process includes seeding the surface, coating the surface with a first solution containing surfactant and electroplating in a second solution in which the level of surfactant is regulated by determining the surface tension and metering surfactant addition to the second solution depending on the determination of surface tension. The copper plating on the photoimagable dielectric is patterned to form an exterior wiring layer which is covered by solder resist with windows over lands around the through holes and surface mount connection pads of the exterior wiring layer to form a high density circuitized substrate. Surface mount components and/or pin in hole components are attached to the circuitized substrate with solder joints between terminals of the components and the lands and/or connection pads to form a high density circuit board assembly. One or more of the circuit board assemblies are mounted in an enclosure with a power supply, CPU, RAM, and I/O means to form an information handling system with increased performance due to shorter signal flight times due to the higher device density.

Manufacturing computer systems with fine line circuitized substrates

Method for recovering an organic solvent from an acidic waste stream such as in integrated chip manufacturing

A method provides for additive plating on a subcomposite having filled plated through holes. Fine-line circuitry is achieved via electroless deposition onto a dielectric substrate after the through hole is plated and filled. Fine-line circuitry may be routed over landless, plated through holes thereby increasing the aspect ratio and the available surface area for additional components and wiring.

A method of testing semiconductor chips is disclosed. The individual semiconductor chips have I/O, power, and ground contacts. In the method of the invention a chip carrier is provided. The chip carrier has contacts corresponding to the contacts on the semiconductor chip. The carrier contacts have dendritic surfaces. The chip contacts are brought into conductive contact with the conductor pads on the chip carrier. Test signal input vectors are applied to the inputs of the semiconductor chip, and output signal vectors are recovered from the semiconductor chip. After testing, the chip may be removed from the substrate. Alternatively, the chip may be bonded through the dendritic conductor pads to the substrate after successful testing.

Method and apparatus for in-situ testing of integrated circuit chips

Growing community of inventors

Johnson City, NY, United States of America

Anilkumar Chinuprasad Bhatt