North Carolina State University

Motorola Corporation

American Research Corporation of Virginia

E.i. Dupont De Nemours and Company

Csir

Angus Ian Kingon

Jon-Paul Maria

Gregory Joseph Dunn

Jovica Savic

Min-Xian M Zhang

Usha Varshney

Kevin Cheek

Stephen Streiffer

William J Borland

Orlando H Auciello

Jon Fredrick Ihlefeld

Rovindra Dat

Adrian W Paterson

Husam N Al-Shareef

Neville Sonnenberg

Dan J Lichtenwalner

Ken D Gifford

Oxygen partial pressure may be controlled during annealing of a perovskite dielectric layer by providing an oxygen-absorbing layer adjacent the perovskite dielectric layer, and annealing the perovskite dielectric layer in an ambient that includes an ambient oxygen partial pressure, such that the oxygen-absorbing layer locally reduces the oxygen partial pressure adjacent the perovskite dielectric layer to below the ambient oxygen partial pressure. Thus, a perovskite dielectric layer can be annealed without the need to provide ultra-high vacuum and/or ultra-high purity ambient environments.

Structures including perovskite dielectric layers and variable oxygen concentration gradient layers

Dielectrics are formed having high dielectric constants, low loss tangents, and other desirable electrical and physical properties. The dielectrics are annealed at temperatures allowing the use of copper foil substrates, and at low oxygen partial pressures.

Thin film dielectrics for capacitors and methods of making thereof

Methods of controlling oxygen partial pressure during annealing of a perovskite dielectric layer

A dielectric film is formed on a free-standing conductive metal layer to form a multi-layer foil comprising a conductive metal layer, a barrier layer and a dielectric oxide layer. Such multi-layer foils are mechanically flexible, and useful for the manufacture of capacitors. Examples of barrier layers include Ni&#x2014;P or Ni&#x2014;Cr alloys. After a second layer of conductive metal is deposited on a dielectric oxide surface opposing the first conductive metal layer, the resulting capacitor foil is processed into a capacitor. The resulting capacitor is a surface mounted capacitor or is formed as a integrated or embedded capacitor within a circuit board.

Multi-layer conductor-dielectric oxide structure

Lanthanum oxide-based gate dielectrics are provided for integrated circuit field effect transistors. The gate dielectrics may include lanthanum oxide, preferably amorphous lanthanum oxide and/or an alloy of lanthanum oxide and silicon oxide, such as lanthanum silicate (La SiO ). Lanthanum oxide-based gate dielectrics may be fabricated by evaporating lanthanum on a silicon surface of an integrated circuit substrate. The lanthanum may be evaporated in the presence of oxygen. Lanthanum and silicon may be co-evaporated. An anneal then may be performed. Lanthanum oxide-based dielectrics also may be used for integrated circuit capacitors.

Lanthanum oxide-based dielectrics for integrated circuit capacitors

A dielectric film is formed on a free-standing conductive metal layer to form a multi-layer foil comprising a conductive metal layer, a barrier layer and a dielectric oxide layer. Such multi-layer foils are mechanically flexible, and useful for the manufacture of capacitors. Examples of barrier layers include Ni&mdash;P or Ni&mdash;Cr alloys. After a second layer of conductive metal is deposited on a dielectric oxide surface opposing the first conductive metal layer, the resulting capacitor foil is processed into a capacitor. The resulting capacitor is a surface mounted capacitor or is formed as a integrated or embedded capacitor within a circuit board.

Lanthanum oxide-based gate dielectrics for integrated circuit field effect transistors

Modulated-structure polycrystalline or heteroepitaxial multilayers of PZT/PT ferroelectric thin films are deposited on a substrate, preferably by laser ablation. The laser ablation of the PZT/PT layers onto a prepared substrate occurs while maintaining the substrate at a temperature between 380.degree. C. to about 650.degree. C. The target source for the PZT/PT laser ablated film may be either bulk PZT and PT ceramics or powders or individual metal oxides or metal pellets. The ferroelectric thin film device may be used for a random access memory.

Modulated-structure of PZT/PT ferroelectric thin films for non-volatile

A method for developing large area highly oriented polycrystalline ferroelectric thin films using spin-on sol-gel deposition and laser crystallization techniques that allow for precise control of temperature distribution. The present invention improves quality, reliability, performance and cost effective production of ferroelectric non-volatile random access memory (FNVRAM) on thermally sensitive silicon and gallium arsenide semiconductor substrates compatible with very large scale integrated circuit technologies. The method is time effective, as crystallization is performed in three seconds as compared to thirteen hours in a conventional furnace for 1 cm.times.1 cm wafer. In addition, crystallization of the film is further achieved without exposing the underneath device structure to detrimental high temperature annealing conditions. The present invention results in minimization of thermal budget, interdiffusion of substrates/electrodes/films and phase segregation, and increased compatibility of PZT ferroelectric thin films with thermally sensitive semiconductor substrates.

Method for producing low thermal budget ferroelectric thin films for

Ferroelectric capacitors with hybrid electrodes including both a conducting oxide and a noble metal may be used to achieve devices having improved performance over capacitors with either platinum or ruthenium oxide electrodes. These hybrid electrode structures can improve capacitor performance both in terms of fatigue and leakage current. Accordingly, these ferroelectric capacitors with hybrid electrodes can be used as elements of an integrated circuit such as a non-volatile memory or dynamic random access memory.

Hybrid metal/metal oxide electrodes for ferroelectric capacitors

The invention provides a sintered ceria/zirconia ceramic and a method of making it. The product comprises a substantially homogeneous mixture of 76-92 mole % zirconia, 8-20 mole % ceria and 0.1-1.2 mole % lanthana and/or praseodymia. The method involves heating an artifact comprising said mixture to a temperature in the range 1200.degree.-1700.degree. C.

Growing community of inventors

Cary, NC, United States of America

Angus Ian Kingon