Nxp B.v.

Koninklijke Kpn N.v.

Koninklijke Philips Corporation N.v.

Koninklijke Ptt Nederland N.v.

Andries Pieter Hekstra

Stefan Drude

Arie Koppelaar

Frank Leong

John Gerard Beerends

Constant Paul Marie Jozef Baggen

Semih Serbetli

Nur Engin

Arian Koster

Johannus Theodorus Matheus Hubertus Dielissen

Frank Harald Erich Ho Chung Leong

Weihua Tang

Ludovicus Marinus Gerardus Maria Tolhuizen

Makoto Noda

Lucien Johannes Breems

Hiroyuki Yamagishi

Johan Paul Marie Gerard Linnartz

Alessio Filippi

Arie Geert Cornelis Koppelaar

Willem Marie Julia Marcel Coene

Robert Rutten

Marinus Van Splunter

Josephus Antonius Huisken

Johan Van Tilburg

Dolf A Schinkel

Robert Koenen

Frits Anthonie Steenhof

Jose Manuel Herrera Van Der Nood

Manuel Herrera Van Der Nood

Marc Klaassen

Franciscus Elisabeth De Caluwe

Arie Geert Cornelius Koppelaar

Sergie Valerjewitsch Sawitzki

Symon Ronald Appel

Jos&eacute; Manuel Herrera Van Der Nood

Various exemplary embodiments relate to a method of communicating by a transmitter. Embodiments of the method may include creating information to be used by a receiver to define a spreading sequence for a subsequent packet, coding the information into a current communications packet, and transmitting the current communications packet.

Multi-pulse communication using spreading sequences

According to the present disclosure, there is provided methods of processing a signal using quantized symbols. More particularly, in one example, the method comprises the steps of processing a signal (), said method comprising the steps of: receiving a signal () comprising a plurality of raw symbols, each raw symbol having a plurality of bits and being conveyed in a channel; estimating a channel state information value () of the channel used to convey each raw symbol to generate a corresponding plurality of channel state information values; quantizing the plurality of raw symbols based on their channel state information values to generate a sequence of quantized symbols (); and quantizing the channel state information values to generate a sequence of quantized channel state values ().

Signal processing using quantized symbols

A receiver, including: a tuner receiving an input signal; a signal processor configured to process the input signal; an automatic gain control (AGC) controller configured to: initialize the receiver in a low gain state; determine the presence of a signal; and increase the receiver gain to determine if a weak signal is present prior to a strong signal.

Method of secure RF ranging under strong multipath reflections

Distance-based authentication is provided for mitigating undesirable interaction and/or attacks upon ranging systems, such as those involving vehicle entry or secure payment. As may be implemented in accordance with one or more embodiments, a leading edge of one or more pulses in a waveform of a signal is obscured as part of distance-based authentication. For instance, noise may be generated via a noise modulation circuit and combined with some or all of a leading edge of a pulse. Distance-based authentication is provided by transmitting a signal with a waveform having the obscured portion of the leading edge, which operates to mitigate detection of the polarity of the leading edge or otherwise of the leading edge itself.

Communications with distance authentication

A receiver for receiving an input signal is disclosed. The receiver includes a processor, a memory, a plurality of sub-receivers configured to receive a plurality of versions of the input signal through a plurality of transmission channels, a sub-receiver selection module configured to select one more of the plurality of sub-receivers using expected contributions to signal-to-noise (SNR) of an output signal based on an uncertainty of the estimated contributions. The receiver also includes a combiner to combine outputs of the selected sub-receivers to produce the output signal.

Efficient rake receiver finger selection

Using a clock circuit, a clock signal is generated at a base frequency. A frequency adjustment circuit selects, based upon a frequency offset value, a particular frequency adjustment value from a plurality of frequency adjustment values. An adjusted clock signal is provided that has a frequency corresponding to the base frequency as modified by the particular frequency adjustment value. Wireless communication signals are received at a wireless communication circuit. From the communication signals, a set of received wireless communication pulses are identified that have a pulse repetition frequency that corresponds to the adjusted clock signal. A distance ranging protocol is applied, using a processing circuit, to the identified set of received communication pulses.

Pulse frequency control for wireless communications and ranging

Aspects of the present disclosure provide communications between local and remote devices having low-frequency (LF) and high-frequency (HF) circuits. As may be implemented in accordance with one or more embodiments, the local device transmits an LF signal to the remote device, which synchronizes its clock based on the LF signal. Another LF signal is communicated from the local device to the remote device using a reduced quality factor, which can be implemented to facilitate synchronization. The clock is resynchronized based on the second LF signal and used to transmit an HF signal with a time delay. The local device synchronizes its clock based on the HF signal, and transmits another HF signal to the remote device using the clock and another time delay. The remote device re-synchronizes its clock based on the second HF signal while accounting for a trip time for communicating the first and/or second HF signals.

Communication synchronization

Various exemplary embodiments relate to a device for performing a method of communication transmission. The device may include a memory; a processor configured to: determine a spreading code with low sidelobe levels in its autocorrelation sequence to be used; create a Start of Frame Delimiter (SOFD) for a packet including the spreading code and a cyclic prefix, wherein the cyclic prefix is a portion of the spreading code; and transmit the packet with the SOFD.

Start of frame delimiter in a communication packet

Aspects of the present disclosure are directed to communications between devices. As consistent with one or more embodiments, a local device has a first clock, a low-frequency (LF) transmitter and a high-frequency (HF) transceiver. A remote device includes a second clock, a LF receiver and a HF transceiver. An LF signal is transmitted from the local device to the remote device and used to synchronize the second clock. The first clock is synchronized based on an HF signal transmitted to the local device using the synchronized second clock and a first predetermined time delay relative to receipt of the LF signal. The second clock is re-synchronized based on a second HF signal transmitted to the remote device using the first clock and a second predetermined time delay relative to receipt of the first HF signal, while accounting for a trip time for communicating one or both of the HF signals.

Communications with synchronization

Aspects of the preset disclosure are directed to processing an analog signal transmitted during active portions of a duty cycle. As may be implemented in accordance with one or more embodiments, an apparatus includes a high-speed sampling circuit that samples portions of such an analog signal at a first rate corresponding to the active portion of the duty cycle, and stores the sampled portions of the analog signal. A low-speed analog-to-digital converter accesses the stored sampled portions and converts the sampled portions to a digital form at a second rate that is slower than the first rate.

Data communications with analog-to-digital conversion

A processor () is disclosed for processing a plurality of Fourier-transformed instances of a symbol, each instance being comprised in one of a plurality of frequency-divided multiplexed subcarriers, said processor being arranged to estimate, for each instance, the channel gain and the inter-carrier interference contribution to said symbol from neighboring subcarriers due to a time-varying channel response of the received signal, and combine the instances into a single representation of said symbol based on the estimated channel gain and the inter-carrier interference contributions. A receiver comprising such a processor and a method for processing such signals are also disclosed.

Signal processor, receiver and signal processing method

Various embodiments relate to a multi-standard Viterbi decoder. Based on programmable values for constraint length, generator polynomials, and code rate, the multi-standard Viterbi decoder may adhere to a specific convolutional code standard. At a given time, the multi-standard Viterbi decoder may receive a variety of convolutional codes through a channel and may process them using various forms of the trace back method. Various embodiments include a branch metric unit and path metric unit that include a variety of sub-units that may or may not be active based on the value of the programmable value. Various embodiments also enable the multi-standard Viterbi decoder to handle different forms of convolutional codes, such as tail-biting codes. In some embodiments, the multi-standard Viterbi decoder may also process at least two convolutional codes concurrently.

Multi-standard viterbi processor

Various embodiments relate to a storage unit and a related method in a Viterbi decoder for decoding a binary convolutional code with power efficiency. A storage unit for storing survivor paths may use a register exchange method to append additional information received from an add-compare-select unit onto the end of the survivor path. An exemplary method produces a prediction path after a specified depth in the survivor path processing history and subtracts the prediction path from the survivor path. This may cause a majority of bits that comprise the survivor path to be converted to a low-energy bit, such as a logical '0'. During subsequent copies of a differential survivor path using the register exchange method, less energy is consumed when copying the entire survivor path, as a majority of the bits in the survivor paths are a logical '0'.

Power-reduced preliminary decoded bits in viterbi decoders

Various embodiments relate to the production of erasure flags to indicate errors resulting from decoding of convolutional codes. A Viterbi decoder may use a register exchange method to produce a plurality of survivor codes. At a defined index, a majority vote may take place comparing values of bits in each of the survivor codes. This majority vote may involve obtaining both the quantity of high-order bits and the quantity of low-order bits and obtaining the difference of the two quantities. The absolute value of the difference of high-order bits to low-order bits may be compared to a defined threshold. When the absolute value difference is below the defined quantity, an erasure flag may be produced and associated with the bits of the defined index, indicating that they are eligible for erasure. In some embodiments, a Reed-Solomon decoder may use the erasure flag to target specific survivor bits or survivor bytes for error-correction through erasure.

Bitwise reliability indicators from survivor bits in Viterbi decoders

A method is disclosed of compensating the output of an ADC for non-linearity in the response of the ADC. The method comprises converting an analog input signal to uncorrected digital ADC output samples, applying a vector of correction variables to each of a block of uncorrected ADC output samples to provide a block of corrected ADC samples, and iteratively minimizing a measure of the spectral flatness of the block of corrected ADC samples with response to the vector of correction variables.

Growing community of inventors

Terheijden, Netherlands

Andries Pieter Hekstra