Intel Corporation

Other

Andrew W Martwick

Theodore Zale Schoenborn

David Stewart Dunning

Alon Naveh

Gary A Solomon

Michael Gutman

Robert A Dunstan

Huimin Chen

Howard L Heck

Dennis Bell

Seh Kwa

Ken Drottar

Alan Edward Waltho

Abdul Rahman Ismail

Zale Theodore Schoenborn

William Dawson Kesling

David Q Xu

Ravid Shmuel

Mohan J Kumar

John B Halbert

Aaron K Martin

Andrew M Volk

Mikal Hunsaker

Zuoguo Wu

Karthi R Vadivelu

David G Ellis

Ronald W Swartz

Michael W Altmann

Dennis J Miller

Richard J Glass

Dawson Kesling

Jay Joseph Nejedlo

Terry M Fletcher

Todd A Hinck

Clay D Allen

Lyonel Renaud

Suneel G Mitbander

Mickey Gutman

Liwei Zhao

Cass A Blodgett

Abdul Hawk Ismail

Andrew P Holland

Scott T Gardiner

Michael D Mirmak

Dmitriy S Garmatyuk

Christopher D Loental

David (Borislav) Girshovich

Bilal S Qureshi

Kamel Ahmad

Mike Wiznerowicz

A scheme for noise floor de-embedding by identifying a link or relationship between noise floor from an oscilloscope and phase jitter impact on a toggling signal. The scheme uses phase or electrical spectrum and phase detection for noise floor recognition. The scheme de-embeds the impact from random noise and also removes deterministic noise or jitter from the oscilloscope. The scheme provides accurate jitter analysis for a circuit (e.g., clock data recovery circuit) after de-embedding noise floor for the oscilloscope.

Oscilloscope noise floor de-embedding for high speed toggle signal measurement

Techniques for encoding data are described herein. The method includes receiving a block payload at a physical layer to be transmitted via a data bus. The method includes establishing a block header comprising an arrangement of bits, the block header defining two block header types, wherein a hamming distance between block header types is at least four.

Method of encoding data

A computing device can include a radio receiver to receive a radio signal from a radio transmitter of a second computing or communication device. The radio receiver can experience radio frequency interference. The computing device can also include a digital signal generator. The digital signal generator can be to process a signal (S) underlying a source of the radio frequency interference. The digital signal generator can also be to generate a digital signal (S). The digital signal generator can further be to inject the digital signal (S) into the radio receiver to cancel the radio frequency interference around the radio frequency of interest.

Radio front end interference cancellation using digital signals

Apparatuses for interconnecting integrated circuit dies. A first set of single-ended transmitter circuits are included on a first die. The transmitter circuits are impedance matched and have no equalization. A first set of single-ended receiver circuits are included on a second die. The receiver circuits have no termination and no equalization. Conductive lines are coupled between the first set of transmitter circuits and the first set of receiver circuits. The lengths of the conductive lines are matched. The first die, the first set of single-ended transmitter circuits, the second die, the first set of single ended receiver circuits and the conductive lines are disposed within a first package. A second set of single-ended transmitter circuits are included on the first die. The transmitter circuits are impedance matched and have no equalization. Data transmitted from the second set of transmitter circuits is transmitted according to a data bus inversion (DBI) scheme. A second set of single-ended receiver circuits is included on a third die. The receiver circuits have termination. Conductive lines are coupled between the second set of transmitter circuits and the second set of receiver circuits. The lengths of the conductive lines are matched and the second set of receiver circuits is disposed within a second package.

Interconnection of a packaged chip to a die in a package utilizing on-package input/output interfaces

Techniques for reducing the spectral content of a data bus are described herein. An example of a device in accordance with the present techniques includes logic to obtain a present bit of data to be transmitted over a data bus and estimate a spectral energy contribution of the present bit at a frequency of interest. The device also includes logic to determine what effect inverting the present bit will have on a net spectral energy of the data bus at the frequency of interest when the present bit is transmitted over the data bus. The device also includes logic to invert the present bit to generate an inverted bit and transmit the inverted bit over the data bus if inverting the present bit reduces the net spectral energy of the data bus at the frequency of interest.

Modifying the spectral energy content of a data bus

Embodiments of systems, apparatuses, and methods for correcting double bit burst errors using a low density parity check technique are disclosed. In one embodiment, an apparatus includes an encoder to generate a parity vector by multiplying a first version of a data vector by a matrix. The parity vector is to identify correctable double-bit burst errors in a second version of the data vector. The apparatus also includes logic to concatenate the parity vector and the first version of the data vector.

Correcting double-bit burst errors using a low density parity check technique

A method and apparatus for dynamically adjusting power of a transmitter is herein described. A transmitter transmits a pattern to a receiver at a differential voltage. The length of the pattern, in one embodiment, is selected to be a reasonable length training pattern, as not to incur an extremely long training phase. If errors are detected at the receiver in the pattern, the transmitter steps the differential voltage until errors are not detected in the pattern at the receiver. The differential voltage, where no errors are detected, is scaled by a proportion of a target confidence level to a measured confidence level associated with the reasonable length training pattern. As a result, a training phase is potentially reduced and power is saved while not sacrificing confidence levels in error rates in the data exchange between the transmitter and receiver.

Adjustable transmitter power for high speed links with constant bit error rate

Briefly, in accordance with one or more embodiments, a platform may comprise a receiver to receive a signal that includes an error in the received signal due to a noise signal generated in the platform, and a processor configured to calculate a noise vector from a source of the noise signal and to send the noise vector to the receiver, The receiver may include a digital signal processor configured to estimate an error vector based at least in part on the noise vector and to subtract the estimated error vector from the received signal to cancel the noise signal from the received signal. The noise cancelled from the received signal may include platform noise generated by a bus, a memory circuit, a clock, a power supply, a circuit ground or integrated circuit substrate, or input/output circuit of the platform.

Baseband cancellation of platform radio interference

In some embodiments, a chip comprises control circuitry to provide inband signals, inband output ports, and transmitters to transmit the inband signals to the inband output ports. The control circuitry selectively includes loopback initiating commands in the inband signals. Other embodiments are described and claimed.

Physical layer loopback

A computer system that detects for a PCI Express compliant endpoint device is described. Specifically, the computer system clocks transmit and receive circuits at a first frequency and initiates a training sequence. If the endpoint device successfully trains at the first frequency, the endpoint device is PCI Express compliant. Otherwise, the computer system initiates another training sequence at a second frequency.

Autodetection of a PCI express device operating at a wireless RF mitigation frequency

Growing community of inventors

Folsom, CA, United States of America

Andrew W Martwick