International Business Machines Corporation

Andrew W Cross

Jay Michael Gambetta

Lev Samuel Bishop

Theodore James Yoder

Ali Javadiabhari

Dmitri Maslov

Guanyu Zhu

Christopher Chamberland

Sergey Bravyi

Shelly-Erika Garion

Jared Barney Hertzberg

David C Mckay

Ismael Faro Sertage

Marco Pistoia

Patryk Gumann

Sean Hart

Youngseok Kim

Antonio Corcoles-Gonzalez

Maika Takita

Neereja Sundaresan

Luciano Bello

Tomas Raphael Jochym-O'Connor

Edward Hong Chen

Riddhi Swaroop Gupta

Benjamin James Brown

According to an embodiment of the present invention, a method, system, and computer program product for preparing a CZ state for use in magic state distillation. The embodiment may include initializing a code state across data qubits. The embodiment may include measuring a CZ operator of the codes state on at least one ancilla qubit proximal to the data qubits. The embodiment may include performing additional quantum operations with the CZ state based on the measurement of the at least one ancilla qubit.

Preparation of a CZ state for quantum computation

A compatibility is ascertained between a configuration of a quantum processor (q-processor) of a quantum cloud compute node (QCCN) in a quantum cloud environment (QCE) and an operation requested in a first instruction in a portion (q-portion) of a job submitted to the QCE, the QCE including the QCCN and a conventional compute node (CCN), the CCN including a conventional processor configured for binary computations. In response to the ascertaining, a quantum instruction (q-instruction) is constructed corresponding to the first instruction. The q-instruction is executed using the q-processor of the QCCN to produce a quantum output signal (q-signal). The q-signal is transformed into a corresponding quantum computing result (q-result). A final result is returned to a submitting system that submitted the job, wherein the final result comprises the q-result.

Job processing in quantum computing enabled cloud environments

A quantum computer includes a quantum processor that includes a first plurality of qubits arranged in a hexagonal lattice pattern such that each is substantially located at a hexagon apex, and a second plurality of qubits each arranged substantially along a hexagon edge. Each of the first plurality of qubits is coupled to three nearest-neighbor qubits of the second plurality of qubits, and each of the second plurality of qubits is coupled to two nearest-neighbor qubits of the first plurality of qubits. Each of the second plurality of qubits is a control qubit at a control frequency. Each of the first plurality of qubits is a target qubit at one of a first target frequency or a second target frequency. The quantum computer includes an error correction device configured to operate on the hexagonal lattice pattern of the plurality of qubits so as to detect and correct data errors.

Quantum code for reduced frequency collisions in qubit lattices

A repository is configured in a hybrid data processing environment comprising a classical computing system and a quantum computing system, to hold a plurality of quantum circuit components (QCC(s)). A degree of difficulty in simulating the received QCC in the classical computing system is transformed into a classical hardness score. A degree of difficulty in implementing the received QCC in the quantum computing system is transformed into a quantum hardness score. A first parameter in a metadata data structure associated with the received QCC is populated with the classical hardness score. A second parameter in the metadata data structure associated with the received QCC is populated with the quantum hardness score. The received QCC is transformed into a library element by at least augmenting the received QCC with the metadata data structure. The library element is added to the repository.

Providing reusable quantum circuit components as a curated service

Systems, computer-implemented methods, and computer program products to facilitate synthesis of a quantum circuit are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a circuit generation component that generates, iteratively, quantum circuits from 1 to N two-qubit gates, wherein at least one or more iterations (1, 2, . . . , N) adds a single two-qubit gate to circuits from a previous iteration based on using added single 2-qubit gates that represent operations distinct from previous operations relative to previous iterations. The computer executable components can further comprise a circuit identification component that identifies, from the quantum circuits, a desired circuit that matches a quantum circuit representation.

Synthesis of a quantum circuit

Techniques for automating quantum circuit debugging are provided that simulate standard debugging behaviors. The technology includes rewriting a source quantum circuit into instrumented circuits based on instrumentation instruction information inserted into software code that corresponds to the source quantum circuit. The instrumented circuits can executed to obtain measurement data corresponding to different state data of qubits within the source quantum circuit. The measurement data can be processed to output generated information corresponding to one or more internal states or processes of a quantum computer associated with the source quantum circuit.

Debugging quantum circuits by circuit rewriting

Techniques regarding calibrating one or more quantum decoder algorithms are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise a correlation inversion decoder component that can calibrate a quantum decoder algorithm for decoding a quantum error-correcting code by estimating hyperedge probabilities of a decoding hypergraph that are consistent with a syndrome dataset.

Calibrated decoders for implementations of quantum codes

A method includes executing a calibration operation on a set of qubits, in a first iteration, to produce a set of parameters, a first subset of the set of parameters corresponding to a first qubit of the set of qubits, and a second subset of the set of parameters corresponding to a second qubit of the set of qubits. In an embodiment, the method includes selecting the first qubit, responsive to a parameter of the first subset meeting an acceptability criterion. In an embodiment, the method includes forming a quantum gate, responsive to a second parameter of the second subset failing to meet a second acceptability criterion, using the first qubit and a third qubit.

Noise and calibration adaptive compilation of quantum programs

Systems, computer-implemented methods, and computer program products to facilitate synthesis of a quantum circuit are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a circuit generation component that generates, iteratively, quantum circuits from 1 to N two-qubit gates, wherein at least one or more iterations (, . . . , N) adds a single two-qubit gate to circuits from a previous iteration based on using added single 2-qubit gates that represent operations distinct from previous operations relative to previous iterations. The computer executable components can further comprise a circuit identification component that identifies, from the quantum circuits, a desired circuit that matches a quantum circuit representation.

A method of error correction for a quantum computer includes identifying each of a plurality of physical qubits arranged in a lattice pattern over a surface in a quantum processor of the quantum computer as a one of a data qubit, an ancilla qubit or a flag qubit to define a plurality of data qubits, ancilla qubits and flag qubits. Each pair of interacting data qubits interact with a flag qubit and adjacent flag qubits both interact with a common ancilla qubit. The method further includes performing measurements of weight-four stabilizers, weight-two stabilizers, or both of a surface code formed using at least a sub-plurality of the plurality of physical qubits, or performing measurements of weight-four Bacon-Shor type gauge operators; and correcting fault-tolerantly quantum errors in one or more of the at least sub-plurality of physical qubits based on a measurement from at least one flag qubit.

Using flag qubits for fault-tolerant implementations of topological codes with reduced frequency collisions

Techniques regarding encoding a quantum circuit to a trivalent lattice scheme to identify flag qubit outcomes are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise a graph component that can encode a quantum circuit to a trivalent lattice that maps an ancilla qubit to a plurality of data qubits via a plurality of flag qubits based on a connectivity scheme of the quantum circuit.

Trivalent lattice scheme to identify flag qubit outcomes

A quantum system includes a qubit array comprising a plurality of qubits. A bus resonator is coupled between at least one pair of qubits in the qubit array. A switch is coupled between the at least one qubit pair of qubits.

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Yorktown Heights, NY, United States of America

Andrew W Cross