USA As Represented by Secretary of the Navy

Agilent Technologies, Inc.

Avago Technologies International Sales Pte. Limited

University of California

Avago Technologies General IP (singapore) Pte. Ltd.

Andrew Thomas Barfknecht

Richard C Ruby

Stephen Douglas Russell

Paul R De La Houssaye

Frank Sigming Geefay

Graham A Garcia

Qing Gan

Michael J Burns

Stanley R Clayton

Martin Franosch

Stephen Roy Gilbert

Klaus-Guenter Oppermann

Qiang Zou

David A Feld

Simon E Labov

Suresh Sridaran

Cheol Hyun Han

Matthias Frank

Jing Wu

Carl A Mears

Siamak Fouladi Azarnaminy

Larry J Hiller

Mohamed Abd Allah

Zongliang Cao

Guiti Zolfagharkhani

An apparatus include a device substrate having an upper surface, and a frame layer having an upper surface. The frame layer is disposed over the upper surface of the device substrate, and a first opening exists in the frame layer. The apparatus also includes a seed layer disposed over the device substrate and substantially bounded by the first opening; and a lid layer having an upper surface. The lid layer is disposed over the upper surface of the frame layer. A second opening exists in the lid layer, and the second opening is aligned with the first opening. The apparatus also includes an electrically and thermally conductive pillar disposed in the first opening and the second opening.

Polymer lid wafer-level package with an electrically and thermally conductive pillar

A BAW resonator includes a nonlinear substrate defining a cavity, and an acoustic stack over the cavity, including a bottom electrode, a piezoelectric layer, and a top electrode, where an active region of the acoustic stack includes overlapping portions of the cavity, the bottom electrode, the piezoelectric layer and the top electrode. The BAW resonator further includes a connecting strip extending from a portion of the top electrode for providing electrical excitation of the acoustic stack, where an E-field generated in the BAW resonator begins at the top electrode and terminates at the bottom electrode in response to the electrical excitation. The cavity includes an inner portion in the active region and an extended portion extending from an outer perimeter of the active region underneath the connecting strip. A length of the extended portion are sufficient to substantially prevent portions of the E-field from passing through the substrate.

Acoustic resonator including extended cavity

A device includes a substrate; a cavity package having a first surface attached to the substrate, the cavity package enclosing an electronic circuit; an elastic layer formed on a second surface of the cavity package, opposite the first surface; and a molding compound formed on the substrate, encasing the cavity package and the elastic layer. The elastic layer decouples stress between the cavity package and the molding compound encasing the cavity package, for maintaining structural integrity of the cavity package and for preventing separation of the cavity package from the substrate.

Packaged device including cavity package with elastic layer within molding compound

A method for separating dies on a wafer includes etching channels around the dies on a first side of the wafer, mounting the first side of the wafer to a quartz plate with an UV adhesive, and grinding a second side of the wafer until the channels are exposed on the second side of the wafer. At this point, the dies are separated but held together by the UV adhesive on the quartz plate. The method further includes mounting a second side of the wafer to a tack tape, exposing UV radiation through the quartz plate to the UV adhesive. At this point, the UV adhesive looses its adhesion so the dies are held together by the tack tape. The method further includes dismounting the quartz plate from the first side of the wafer and picking up the individual dies from the tack tape.

Die singulation using deep silicon etching

A method for forming a wafer package includes forming a die structure, wherein the die structure includes a first wafer, a device mounted on the first wafer, a second wafer mounted atop the first wafer with a first seal ring around the device and a second seal ring around a via contact. The method further includes forming a trench in the second wafer around the first seal ring, filling the trench and the via contact with a sealing agent, patterning a topside of the second wafer to removed the excessive sealing agent and to expose a contact pad of the via contact, and singulating a die around the first seal ring.

Film deposition to enhance sealing yield of microcap wafer-level package with vias

A cryogenic, high-resolution X-ray detector with high count rate capability has been invented. The new X-ray detector is based on superconducting tunnel junctions (STJs), and operates without thermal stabilization at or below 500 mK. The X-ray detector exhibits good resolution (&tilde;5-20 eV FWHM) for soft X-rays in the keV region, and is capable of counting at count rates of more than 20,000 counts per second (cps). Simple, FET-based charge amplifiers, current amplifiers, or conventional spectroscopy shaping amplifiers can provide the electronic readout of this X-ray detector.

Cryogenic, high-resolution x-ray detector with high count rate capability

A method for the fabrication of active semiconductor and high-temperature perconducting devices on the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

Method for making a monolithic integrated high-T.sub.c

A method for the fabrication of active semiconductor and high-temperature superconducting device of the same substrate to form a monolithically integrated semiconductor-superconductor (MISS) structure is disclosed. A common insulating substrate, preferably sapphire or yttria-stabilized zirconia, is used for deposition of semiconductor and high-temperature superconductor substructures. Both substructures are capable of operation at a common temperature of at least 77 K. The separate semiconductor and superconductive regions may be electrically interconnected by normal metals, refractory metal silicides, or superconductors. Circuits and devices formed in the resulting MISS structures display operating characteristics which are equivalent to those of circuits and devices prepared on separate substrates.

Monolithic integrated high-T.sub.c superconductor-semiconductor structure

Growing community of inventors

Menlo Park, CA, United States of America

Andrew Thomas Barfknecht