Samsung Electronics Co., Ltd.

Samsung Sdi Co., Inc.

Andrew Tae Kim

Jaehyung Kim

Jinwoo Kim

Dong-Suk Shin

Hong-Jae Shin

Yong-Kuk Jeong

Taegon Kim

Junhyung Lee

Kyoung-Woo Lee

Jungmin Kang

Youngkwang Yun

Hoseong Kim

Minhee Lee

Daesung Ro

Joonsup Kim

Jaehee Ha

Junggun Lim

Kichul Ham

Jaehee Kyoung

A secondary battery includes: an electrode assembly; a case accommodating the electrode assembly; an electrode tab extending from the electrode assembly; a sealing part for insulating the electrode tab from the case; and an insulation film around the electrode tab and between the sealing part and the electrode assembly.

Secondary battery

The semiconductor device includes a fuse structure disposed on a substrate. An interlayer dielectric disposed on the fuse structure. A first contact plug, a second contact plug, and a third contact plug penetrate the interlayer dielectric and wherein each of the first contact plug, the second contact plug and the third contact plug are connected to the fuse structure. A first conductive pattern and a second conductive pattern are disposed on the interlayer dielectric. The first conductive pattern and the second conductive pattern are electrically connected to the first contact plug and second contact plug, respectively.

Semiconductor device and methods of forming the same

A semiconductor device includes an active region. A gate electrode is disposed on the active region. An isolation region adjoins the active region, and is recessed with respect to a top surface of the active region underlying the gate electrode. The isolation region may be recessed a depth substantially equal to a height of the gate electrode. In some embodiments, the gate electrode is configured to support current flow through the active region along a first direction, and a tensile stress layer covers the gate electrode and is configured to apply a tensile stress to the gate electrode along a second direction perpendicular to the first direction. The tensile stress layer may cover the recessed isolation region and portions of the active region between the isolation region and the gate electrode. In further embodiments, an interlayer insulating film is disposed on the tensile stress layer and is configured to apply a tensile stress to the gate electrode along the second direction.

Semiconductor devices having selectively tensile stressed gate electrodes and methods of fabricating the same

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Gyeonggi-do, South Korea

Andrew Tae Kim