Bae Systems Information and Electronic Systems Integration Inc.

Ovonyx Inc.

Andrew T Pomerene

Vu Anh Vu

Daniel N Carothers

Jon Maimon

Craig M Hill

Robert L Kamocsai

Keith K Sturcken

Thomas J McIntyre

Sandra L Hyland

Timothy J Conway

Daniel J O'Donnell

Steven J Wright

Tushar T Shah

Tuyet T Bach

Tom J McIntyre

A bulk manufacturing method for growing silicon-germanium stained-layer superlattice (SLS) using an ultra-high vacuum-chemical vapor deposition (UHV-CVD) system and a detector using it is disclosed. The growth method overcomes the stress caused by silicon and germanium lattice mismatch, and leads to uniform, defect-free layer-by-layer growth. Flushing hydrogen between the layer growths creates abrupt junctions between superlattice structure (SLS) layers. Steps include flowing a mixture of phosphine and germane gases over a germanium seed layer. This in-situ doped germanium growth step produces an n-doped germanium layer. Some of the phosphorus diffuses into the underlying germanium and reduces the stress in the underlying germanium that is initially created by the lattice mismatch between germanium and silicon. Phosphine can be replaced by diborane if a p-doped layer is desired. The reduction of stress results in a smooth bulk germanium growth.

Method for growing germanium/silicon&#x2014;germanium superlattice

A method for manufacturing a photodetector including growing a quantity of germanium within an optical pathway of a waveguide. The detection of a current caused by an interaction between the optical signal and the germanium is used to indicate the presence of an optical signal passing through the waveguide.

In-line germanium avalanche photodetector

Techniques are disclosed for efficiently fabricating semiconductors including waveguide structures. In particular, a two-step hardmask technology is provided that enables a stable etch base within semiconductor processing environments, such as the CMOS fabrication environment. The process is two-step in that there is deposition of a two-layer hardmask, followed by a first photolithographic pattern, followed by a first silicon etch, then a second photolithographic pattern, and then a second silicon etch. The process can be used, for example, to form a waveguide structure having both ridge and channel configurations, or a waveguide (ridge and/or channel) and a salicide heater structure, all achieved using the same hardmask. The second photolithographic pattern allows for the formation of the lower electrical contacts to the waveguides (or other structures) without a complicated rework of the hardmask.

Two-step hardmask fabrication methodology for silicon waveguides

Techniques are disclosed that facilitate fabrication of semiconductors including structures and devices of varying thickness. One embodiment provides a method for semiconductor device fabrication that includes thinning a region of a semiconductor wafer upon which the device is to be formed thereby defining a thin region and a thick region of the wafer. The method continues with forming on the thick region one or more photonic devices and/or partially depleted electronic devices, and forming on the thin region one or more fully depleted electronic devices. Another embodiment provides a semiconductor device that includes a semiconductor wafer defining a thin region and a thick region. The device further includes one or more photonic devices and/or partially depleted electronic devices formed on the thick region, and one or more fully depleted electronic devices formed on the thin region. An isolation area can be formed between the thin region and the thick region.

Multi-thickness semiconductor with fully depleted devices and photonic integration

A thermoelectric microactuator on a substrate includes a first temperature control element having a first surface bonded to the substrate and having a second surface. A first electrically nonconductive layer has a first surface bonded to the second surface of the first temperature control element and has a second surface. An actuator arm includes a first region bonded to the second surface of the first nonconductive layer and includes a flexure contiguously extending from the first region to an end cantilevered beyond the first nonconductive layer and forming an axis at the junction of the flexure and the first region. The first temperature control element controls the temperature of the actuator arm to thereby deflect the flexure about the axis.

Thermoelectric microactuator

A programmable resistance memory element using a conductive sidewall layer as the bottom electrode. The programmable resistance memory material deposited over the top edge of the bottom electrode in a slot-like opening formed in a dielectric material. A method of making the opening using a silylated photoresist.

Method for making programmable resistance memory element

A method of making a electrically operated programmable resistance memory element. A silylated photoresist sidewall spacer is used as a mask for form raised portions on an edge of a conductive layer. The modified conductive layer is used as an electrode for the memory element.

Method for making programmable resistance memory element using silylated photoresist

A method of forming a plurality of micro column interconnection structures on a semiconductor includes providing a semiconductor layer. A photoresist layer is formed on the semiconductor layer. A plurality of cavities are etched in the photoresist layer. The plurality of cavities extend through the photoresist layer to the semiconductor layer. Solder is deposited in the plurality of cavities, thereby forming a plurality of micro columns of solder.

Method for forming a micro column grid array (CGA)

A method for manufacturing microscopic canals within a semiconductor is disclosed. A shallow trench is initially formed on a substrate using a patterned photoresist. After the patterned photoresist has been removed from the substrate, a separation layer, such as a Titanium layer, is deposited on the substrate. Subsequently, a cap layer, such as a Titanium nitride layer, is deposited on the separation layer. Both the separation layer and the cap layer are then polished off from the surface of the substrate. Finally, a Tungsten layer is deposited on the substrate and in the trench such that a microcanal will be formed within the trench as a result.

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Leesburg, VA, United States of America

Andrew T Pomerene