Qualcomm Incorporated

Andrew S Irwin

Rodney Wayne Smith

James Norris Dieffenderfer

Michael Scott McIlvaine

Brian Stempel

Michael W Morrow

Melinda Joyce Brown

Jeffery Michael Schottmiller

Yusuf Cagatay Tekmen

Kiran Ravi Seth

Tejaswi Talluru

Daniel Higdon

Jeffrey M Schottmiller

Brian Michael Stempel

Michael Scott Mcilvaine

Michael William Morrow

A method for speeding the re-use of Physical Register Names (PRNs), and hence the processor registers, in a processor. The method involves returning a PRN to a freelist for reuse when it is obsolete even when it is not complete, and blocking writes to the Processor Register File (PRF) by obsolete realms.

Fast reuse of physical register names

Fusing immediate value, write-based instructions in instruction processing circuits, and related processor systems, methods, and computer-readable media are disclosed. In one embodiment, a first instruction indicating an operation writing an immediate value to a register is detected by an instruction processing circuit. The circuit also detects at least one subsequent instruction indicating an operation that overwrites at least one first portion of the register while maintaining a value of a second portion of the register. The at least one subsequent instruction is converted (or replaced) with a fused instruction(s), which indicates an operation writing the at least one first portion and the second portion of the register. In this manner, conversion of multiple instructions for generating a constant into the fused instruction(s) removes the potential for a read-after-write hazard and associated consequences caused by dependencies between certain instructions, while reducing a number of clock cycles required to process the instructions.

Fusing immediate value, write-based instructions in instruction processing circuits, and related processor systems, methods, and computer-readable media

Fusing conditional write instructions having opposite conditions in instruction processing circuits and related processor systems, methods, and computer-readable media are disclosed. In one embodiment, a first conditional write instruction writing a first value to a target register based on evaluating a first condition is detected by an instruction processing circuit. The circuit also detects a second conditional write instruction writing a second value to the target register based on evaluating a second condition that is a logical opposite of the first condition. Either the first condition or the second condition is selected as a fused instruction condition, and corresponding values are selected as if-true and if-false values. A fused instruction is generated for selectively writing the if-true value to the target register if the fused instruction condition evaluates to true, and selectively writing the if-false value to the target register if the fused instruction condition evaluates to false.

Fusing conditional write instructions having opposite conditions in instruction processing circuits, and related processor systems, methods, and computer-readable media

Growing community of inventors

Raleigh, NC, United States of America

Andrew S Irwin