Neomagic Corporation

Netlogic Microsystems, Inc

Andrew Rosman

Mangesh S Pimpalkhare

Tao Lin

Pankaj Gupta

Ashish Goel

Mark Birman

Ming-Ju Li

A data stream search system can include a plurality of search data inputs logically divided into at least M+N sets. The sets have a logical order with respect to one another, each set providing more than one bit value. A key application circuit can comprise a plurality of data paths that each couple a different group of at least M data input sets to a corresponding content addressable memory (CAM) section. Each different group of at least M data input sets can be contiguous with respect to the logical order, and shifted in bit order from one another by at least two bits.

Pattern matching system and method for data streams, including deep packet inspection

A processing system includes a network processor and a CAM device having a re-entrant processor coupled to a CAM array. The re-entrant processor is configured to selectively modify an initial search key provided by the network processor by replacing portions of the initial search key with portions of one or more previous search keys and/or one or more previous results. The re-entrant processor is also configured to initiate a series of subsequent compare operations between new search keys and data stored in the CAM array without receiving additional instructions or search keys from the network processor.

Re-entrant processing in a content addressable memory

A CAM device having two execution pipelines includes control logic and a CAM core. The CAM core includes a plurality of independently searchable CAM arrays for storing CAM words. The control logic receives a first request that selects any number of the CAM arrays for a first compare operation, and receives a second request that selects any number of the CAM arrays for a second, separate compare operation. The control logic determines whether the same CAM array is selected by both requests. If not, the control logic schedules the first and second compare operations to be executed simultaneously in the CAM core. Otherwise, the control logic schedules the first and second compare operations for sequential executionuses a suitable arbitration technique to determine the order in which the first and second compare operations will be executed in the CAM core.

Simultaneous multi-threading in a content addressable memory

A 3D-graphics engine has several texture maps with different levels of detail (LOD). The largest of the four derivatives of the u,v texture-map coordinates with respect to the x,y screen coordinates determines which LOD texture map to select. Using bi-linear interpolation, the four nearest texture pixels or texels are fetched from the texture map in a texture memory and a weighted-average texel generated. Distortion in space and time can be visible when a triangle transitions from one LOD texture map to the next LOD map. Tri-linear interpolation eliminates this LOD-transitioning distortion by generating weighted-average texels for both the LOD map and for four texels from a next LOD map. Unfortunately the calculational complexity is more than doubled for tri-linear rather than bi-linear interpolation. Tri-linear interpolation is employed only near a transition to a next LOD map. When the derivatives are not near an LOD-map transition, only bi-linear interpolation is performed. When the derivatives are near the LOD transition, tri-linear interpolation smoothes out the transition, eliminating visible distortions. The tri-linear interpolation performs linear LOD-blending with various slopes larger than typical, or with a non-linear blending function read from a lookup table. An interpolation factor read from the lookup table or generated by shifting the LOD fraction is multiplied by the weighted-texel average for the tri-linear weighting.

Texture map blender with adaptive interpolation when switching to a new level-of-detail map

Disclosed is a texture prefetching method for use in a three-dimensional graphics display system in which texture maps of an object are stored in memory for texels at (u,v) memory locations. The method of fetching texels for use in calculating (x,y) display pixel values comprises the steps of: a) identifying in (u,v) space a geometric shape to be displayed in (x,y) space, b) establishing tiles of pixels within the geometric shape for use in accessing texels, c) computing texel addresses at one side of a tile based on current addresses (topuc, topvc) and first and second derivatives of (u,v) as a function of (x) and a first derivative as a function of (y), d) computing texel addresses at an opposing side of the tile based on current addresses (u v ) and first and second derivatives of (u,v) as a function of (x) and a first derivative as a function of (y), and e) fetching texel blocks within the tiles as defined by the addresses in steps c) and d). In a preferred embodiment, the geometric shape is a triangle, and a tile comprises a quadrilateral having top and bottom pixel locations for two opposing sides, and step c) and step d) define comers of the quadrilateral in (u,v) space.

Steaming prefetching texture cache for level of detail maps in a 3D-graphics engine

A reciprocal generator is useful for perspective correction for 3D graphics. The input range is divided into many sections. A lookup table contains reciprocal outputs for only two of the sections, the smallest-inputs section and the largest-inputs section. Entries in the table for the smallest section contain a base and a scale factor to indicate the reciprocal value. One entry is provided for each possible input value in the smallest section. This provides high precision where the outputs have the largest values, reducing visible distortions caused by relatively small changes in the large output values. Each section is divided into intervals, with one table entry for each interval. For the largest section, each table entry has an initial reciprocal and a slope of a line approximating the reciprocal curve in that interval. Reciprocals for inputs within the interval are calculated by multiplying an offset into the interval by the slope, and then adding to the initial reciprocal for that interval. Each section is twice as wide as the previous section, but has the same number of intervals. A scale factor is generated by counting a number of leading zeros in the input. Then the input is shifted by the number of leading zeros and input of the table. Thus the inputs are scaled to points within the largest section, so intermediate sections do not have to be stored in the table.

Reciprocal generator using piece-wise-linear segments of varying width with floating-point format

A 3D graphics processor has parallel triangle pixel pipelines. One or more triangle setup engine(s) receives triangle primitives from a host or geometry engine and generates vertex color, texture and other attributes as well as their gradients. The triangle setup engine makes available all required triangle data to the triangle pixel pipelines. The triangle pixel pipelines accept the next triangle data on a demand basis, when finished with the previous triangle. Each triangle pixel pipeline has a span engine that generates endpoints along the 3 edges of the triangle where the horizontal lines (spans) intersect. Each triangle pixel pipeline also has a raster engine that receives the endpoints as well as gradients and generates color, texture and other attributes for each pixel along a span between endpoints. The raster engine then composites pixels from these attributes and updates visible pixels in the frame buffer. Pixel-memory coherency for Z-buffering is maintained by comparing an MSB part of the X pixel address and the span line number (Y address) of pixels being processed in each pipeline. Thus a span-range of pixels is compared rather than individual pixels. When span-ranges of pixels being rasterized in two different triangle pixel-pipelines overlap, one of the pipelines must stall until the other finishes the span-range. For rendering modes with alpha-blending enabled or Z-buffering disabled triangle input order must be maintained during pixel rasterization. To maintain proper order, bounding boxes of triangles processed in different pipelines are compared. When the bounding boxes overlap, even if the triangles do not overlap, one pipeline is held until the other completes the triangle.

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Andrew Rosman