Cadence Design Systems, Inc.

Andrew Robert Wilmot

Neeti Khullar Bhatnagar

George Franklin Frazier

William W LaRue, Jr

Joshua D Levine

Qizhang Chao

Dave Von Bank

Tuay-Ling Kathy Lang

Robert D Shur

Yonatan Ashkenazi

Tal Tabakman

Stuart C Rae

Yevgen Ryazanov

Vincent Motel

Edwin A Harcourt

Bishnupriya Bhattacharya

Zhiting Duan

Rohan Kangralkar

Koushik Roy

Doug Dunlop

The present disclosure relates to a method for use with an electronic design. Embodiments may include simulating a processor model and a hardware model, each executed with a corresponding simulator thread on a simulation platform. Embodiments may also include simulating embedded software using the processor model. The simulating may include updating a given register of the processor model that stores a value that changes in response to switching between processes within the embedded software. Embodiments may further include setting a simulator breakpoint and a software breakpoint and enabling debugging of both non-virtual and virtual addresses at the software breakpoint without leaving the software breakpoint.

System and method for non-intrusive debugging at an embedded software breakpoint

According to an embodiment, a system and method are provided for constructing an accurate view of memory and events on a simulation platform. The system memory view can be used with a debug and analysis tool to provide post-processing debug, including searching forward and backward in capture time of the stored memory view to analyze the events of the simulation. The memory is constructed by capturing and storing each memory execution transaction, bus transaction, and register transaction during simulation. Changes in simulation platform hardware state may also be captured and stored in a hardware state database, including switches between process threads detected during the simulation that may update a simulator register. The captured events provide observability into the OS processes, the hardware, and the embedded software of the simulation platform.

Post simulation debug and analysis using a system memory model

According to an embodiment, a system and method are provided for supporting interactive debugging of embedded software (ESW) on a simulation platform. A processor model within the simulated system will support a register and memory tracing sub-module. Simulator and emulator breakpoints will be used with the modeled objects within the tracing sub-module. For example, a simulator breakpoint may be set for the task or function that buffers the trace information so it can be written to a file. A database of register and memory values which represent the complete history of register and memory value changes during a simulation can be created from trace information and can be accessed to non-intrusively obtain any processor register or memory value during simulation. The processor register and memory values of the database can also be accessed to symbolically show the behavior of ESW concurrently with hardware behavior in the simulation.

Method for interactive embedded software debugging through the control of simulation tracing components

The present disclosure relates to a system and method for use in an electronic design environment. Embodiments may include receiving, using at least one processor, an electronic design and generating a unique name for each hardware state element associated with the electronic design. Embodiments may further include generating a unique name for each software state element associated with the electronic design. Embodiments may also include combining a plurality of unique names into an arbitrary expression, wherein the plurality of unique names includes at least one software state unique name and at least one hardware state unique name. Embodiments may further include evaluating the arbitrary expression at one or more discrete time points. Embodiments may also include recording an evaluated expression in an electronic design database.

System and method for visualizing event sequences for expressions using both hardware and software state information

Aspects of the present invention describe a system and method for providing a single integrated simulation interface running in a single host operating system (OS) thread to observe and control multiple, disparate software and hardware components. Control mechanisms of the present invention provide access to each of the modeled components, including the hardware models, the embedded software components modeled on the bare-hardware elements, and the software applications, processes and threads which are themselves running on embedded software.

Simulation observability and control of all hardware and software components of a virtual platform model of an electronics system

The present disclosure relates to a system and method for capturing log messages in a post-processing debugging environment. Embodiments may include receiving a processor model associated with an electronic design and generating, using one or more processors and the processor model, a complete view of the state of the memory. Embodiments may further include writing, using one or more processors and the processor model, a log message whenever a designated message logging function is reached within the complete view of the state of the memory.

Debugging process

An apparatus and method for determining an optimal global quantum value for use in event-driven simulations of a device are disclosed herein. The device is simulated using information representative of a device design corresponding to the device, the simulation of the device comprising an event-driven simulation using a provisional global quantum value. Events included in a sequence chart corresponding to the simulation using the provisional global quantum value are compared against expected events. Based on the comparison detecting at least one of the expected events being absent in the sequence chart, providing the optimal global quantum value as being smaller than the provisional global quantum value. Based on the comparison detecting no difference between the events in the sequence chart and the expected events, providing the optimal global quantum value as being larger than the provisional global quantum value.

Determining an optimal global quantum for an event-driven simulation

Aspects of the present invention provide a system and method for a user of an event-driven simulator to specify breakpoint conditions in kernel modules, startup processes, shared libraries, and other automatically loaded software elements before the target environment is initialized. The virtual platform detects specified breakpoints when a file is loaded onto a virtual platform debugger during startup of the environment or initialization of the relevant processes. The virtual platform debugger may scan for specified breakpoints in all loaded source code files, in only those source code files that are automatically loaded, or in only those source code files specified by the designer as modified.

Method for setting breakpoints in automatically loaded software

Aspects of the present invention provide a system and method for a user of an event-driven simulator to specify complex breakpoint conditions and actions which allow both hardware and software states to be accessed. In a virtual platform modeling hardware components, bare-metal software programs, and high-level software applications or processes, a global identifier may be used to unambiguously identify each element, object, and subcomponent of the modeled system. The unambiguous global identifier may include an instance name and a hierarchical path name. A state of a specific element, object, or modeled component may trigger a breakpoint or be utilized or set as part of a breakpoint condition.

Aspects of the present invention describe a system and method for a user of an event-driven simulation environment and/or embedded software debugger interface to step through the source code of components modeled by the environment/debugger, including the embedded software or hardware model source code. In a virtual platform modeling hardware components, bare-metal software programs, and high-level software applications or processes, the source code of each modeled component may be stepped through during simulation. Insertion points for breakpoints or watchpoints may be detected during a traversal of the source code of each component being modeled in the virtual platform and such breakpoints inserted automatically.

Method, system, and computer program product for saving and restarting discrete event simulations are provided. A discrete event simulation of a scenario is performed via a process executing on a system. The process includes one or more application threads. A checkpoint of the process is created at a point in time when a command to save the discrete event simulation of the scenario is received. The checkpoint includes data elements of the process and the one or more application threads of the process that are stored in components of the system at the point in time. These data elements reflect a state of the process and the one or more application threads of the process at the point in time. The checkpoint is saved to one or more files in the system that are usable to later restart the discrete event simulation of the scenario from the point in time.

Saving and restarting discrete event simulations

A system for controlling reset in discrete event simulation is disclosed. The system includes a simulator configured to effect the discrete event simulation, the simulator having a plurality of shared executable files, a memory configured to store the simulator for execution, an operating system having a loading/unloading facility, and a control program configured to effect a reset operation by directing the operating system to unload the simulator from the memory and then reload the simulator into the memory using the loading/unloading facility.

Method and system for realizing reset in discrete event simulation

A method for simulation of mixed-language circuit designs is disclosed. In one embodiment, an object-oriented language module is natively instantiated within a hardware description language based design. In another embodiment, a hardware description language module is natively instantiated within an object-oriented language based design. A system for simulation of mixed-language circuit designs is also disclosed. In one embodiment, a simulator is configured to natively manipulate an object-oriented language module within a hardware description language based design. In another embodiment, a simulator is configured to natively manipulate a hardware description language module within an object-oriented language based design.

Growing community of inventors

Carlisle, MA, United States of America

Andrew Robert Wilmot