Amazon Technologies, Inc.

Cisco Technology, Inc.

Andrew Robert Sinton

Ori Cohen

Barak Wasserstrom

Moshe Raz

Erez Tsidon

Asaf Modelevsky

Yaron Sella

Michal Irit Devir

Harel Cain

Aviad Kipnis

Eliphaz Hibshoosh

David Wachtfogel

Akram Baransi

Adi Karolitsky

Technologies are disclosed for using hardware-embedded monitors to monitor pages of local memory and detect attribute violations or other unauthorized operations relating to the memory. The attribute violations may include determining that a measurement of an executable page to be loaded into memory does not match any entry in a list of allowed pages for the memory. Responsive to detecting a violation, an alert or other mitigation protocol, which may include an audit of activities surrounding the violation, may be performed.

Secure monitors for memory page protection

A modified measured boot approach is utilized for establishing a secure communication link between two devices. Each device may execute a respective boot process until the device reaches the stage responsible for establishing the communication link with the other device. Each device may exchange its respective self-signed certificate and extend its certificate chain with the self-signed certificate received from the other device. A secure link can be established using the public key of the other device as a based key for a key exchange protocol.

Extending measured boot for secure link establishment

A boot process for a computing device, such as integrated circuit, includes security features that are inaccessible during certain operation modes. An image including permission to access those security features is received during the boot process and may be verified using one or more keys. In operation, access to the security features is permitted during the operation modes after the image is verified. Such an approach enables a boot process to permit access to certain features after receipt and verification of different images.

Combination boot for an integrated circuit

Technologies are disclosed for using hardware-embedded monitors to monitor pages of local memory and detect attribute violations or other unauthorized operations relating to the memory. The attribute violations may include mismatches of attributes (e.g., designating a page as writeable versus executable or vice versa) in entries in a translation buffer that point to a same physical address or other mismatches between designations of attributes for a page in physical and virtual space. Responsive to detecting a violation, an alert or other mitigation protocol, which may include an audit of activities surrounding the violation, may be performed.

A modified measured boot approach is utilized for establishing a secure communication link between two devices. Each device may execute a respective boot process until the device reaches the stage responsible for establishing the communication link with the other device. Each device may exchange its respective self-signed certificate and extend its certificate chain with the self-signed certificate received from the other device. Each device can then generate a new pair of keys based on its extended certificate chain that includes the identity of the other device, and exchange the public key of the new key pair with the other device. A secure link can be established using the public key of the other device as a based key for a key exchange protocol. A central management entity can attest the measurements of the boot stages for each device using the corresponding public key.

A computer chip, such as an System on chip (SOC), can receive firmware updates having two separate signatures; a first of the signatures is used to authenticate the firmware using a processor within the computer chip, and a second of the signatures is used by a controller, separate from the processor. A first key, used by the processor to authenticate the firmware, can be a boot key that is hardwired in the computer chip. A second key, used by the controller, can be a key that is provided to the controller at any time and is updatable. The controller can suspend the processor so that the controller can perform a first authentication of the firmware using the second signature and the second key. If the authentication is successful, the controller can release the processor, which then uses the first key and the first signature to perform a second authentication.

Secure boot of an integrated circuit

One embodiment of the invention includes a method, including performing, a symmetric homomorphic encryption of a secret Swith a cryptographic key H as input yielding a homomorphic encryption result S*, sending S* for mathematical combination by at least one device with at least one secret Syielding G*, the device A not having access to S, the at least one device not having access to Sand not having access to H, receiving G*, performing a symmetric homomorphic decryption of data based on G* with H as input yielding a first decrypted output, determining a symmetric cryptographic key KA based on the first decrypted output for secure communication with a first device which is operationally connected to, or includes, a tamper resistant security system including Sand Stherein, securing data using KA yielding secured data, and sending the secured data to the first device.

Homomorphically-created symmetric key

A method for implementing response function agnostic, challenge-response authentication on a CE device includes sharing a series of proxy responses to a series of authentication challenges with a service provider, receiving an associated actual response from an initialization phase response function for each of the authentication challenges, where at least one of the initialization phase response function and a parameter required for the initialization phase response function is withheld from the service provider, encrypting each of the proxy responses with its associated actual response, thereby generating a series of encrypted proxy responses, storing the encrypted proxy responses on the CE device, receiving one of the authentication challenges from the service provider, inputting the authentication challenge to an operation phase response generator on the CE device, where the operation phase response generator is configured with the same response function used by the initialization phase response generator, and decrypting the proxy response from the encrypted proxy responses and results of the inputting, thereby producing the proxy response to the authentication challenge without sharing the at least one of the response function and a parameter required for the response function with the service provider. Related apparatus and methods are also described.

System for efficient generation and distribution of challenge-response pairs

In one embodiment, a system includes a control word processor to generate first regional-specific control word formation data items (RSCWFDI), for a first geographical sub-region of a primary geographical region which includes different geographical sub-regions, for use over cryptoperiods, the first RSCWFDI being used in generating control words in receiver-decoder devices, an encryption engine to encrypt content with the control words over the cryptoperiods yielding encrypted content, a first transmission apparatus to broadcast the first RSCWFDI and the encrypted content in the primary geographic region, and a communication interface to share data about second RSCWFDI of the first geographical sub-region with at least one regional transmission apparatus of the first geographical sub-region operative to broadcast the second RSCWFDI of the geographical sub-region in the geographical sub-region, wherein each control word may be generated in the receiver-decoder devices using one of first and one second RSCWFDI.

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Jerusalem, Israel

Andrew Robert Sinton