Raytheon Company

University of Massachusetts

Andrew R Southworth

James E Benedict

Thomas V Sikina

Kevin Wilder

John P Haven

Mikhail Pevzner

Mary K Herndon

Erika Klek

Semira M Azadzoi

Jonathan E Nufio-Molina

Alkim Akyurtlu

Gregory G Beninati

Michael Ryan Souliotis

Oshadha K Ranasingha

Matthew Souza

Aaron Michael Torberg

Gregory M Fagerlund

Phillip W Thiessen

Paul A Danello

Timothy David Deley

Wade A Schwanda

Kevin M Wilder

Erika C Klek

A low profile array (LPA) includes an antenna element array layer having at least one Faraday wall, and a beamformer circuit layer coupled to the antenna element array layer. The beamformer circuit layer has at least one Faraday wall. The Faraday walls extends between ground planes associated with at least one of the antenna element array layer and the beamformer circuit layer.

Low profile phased array

An apparatus to automatically place layers of a printed circuit board on a fixture includes a robotic device having a base that is secured to a surface, an upright column that extends upwardly from the base, and a movable arm rotatably coupled to the upright column. The movable arm is configured to rotate about a vertical axis defined by the upright column. The movable arm is further configured to rotate from a position in which the movable arm is disposed over a laminate sheet fixture and to pick up a laminate sheet to a position in which the movable arm is disposed over a board layup fixture to deposit the laminate sheet in the board layup fixture, and from a position in which the movable arm is disposed over a bond film fixture and to pick up a bond film to a position in which the movable arm is disposed over the board layup fixture to deposit the bond film in the board layup fixture.

Printed circuit board automated layup system

A circuit assembly is provided and includes a printed circuit board (PCB) having a circuit element region and defining a trench surrounding an entirety of the circuit element region, a circuit element disposed within the circuit element region of the PCB; and a Faraday wall. The Faraday wall includes a solid, unitary body having a same shape as the trench. The Faraday wall is disposed within the trench to surround an entirety of the circuit element.

Wall for isolation enhancement

A process of fabricating an electromagnetic circuit includes providing three laminate sheets, forming a first feature in a first laminate sheet of the three laminate sheets, and forming a second feature in a second laminate sheet of the three laminate sheets. The second feature is aligned with the first feature when aligning the second laminate sheet with the first laminate sheet. The process further includes stacking the three laminate sheets so that the first laminate sheet is positioned above and aligned with the second laminate sheet and the second laminate sheet is positioned above and aligned with the third laminate sheet. The first feature and the second feature define a contiguous element. The process further includes filling the contiguous element with an electrically conductive material to form an electrically continuous conductor.

Method for forming channels in printed circuit boards by stacking slotted layers

An antenna and method of manufacturing an antenna. The antenna includes a radiator feed layer, a first radiator patch assembly attached to the radiator feed layer, and a second radiator patch assembly attached to the radiator feed layer. The first radiator patch assembly is separated from the second radiator patch assembly by an air gap. The first radiator patch assembly is attached to the radiator feed layer and the second radiator patch assembly is attached to the radiator feed layer separated from the first radiator patch assembly by the air gap.

Segmented patch phased array radiator

An apparatus for automating the fabrication of a copper vertical launch (CVL) within a printed circuit board (PCB) includes a feed mechanism to feed and extrude copper wire from a spool of copper wire and a wire cutting and gripping mechanism to receive copper wire from the feed mechanism, cut and secure a segment of copper wire, insert the segment of copper wire into a hole formed within the PCB, solder an end of the segment of copper wire to a signal trace of the PCB, and flush cut an opposite end of the segment of the copper wire to a surface of the PCB. The wire cutting and gripping mechanism includes a wire cutter to flush cut the segment of copper wire and an integrated heated gripper device to receive the copper wire from the spool of copper wire and cut and grab a segment from copper wire.

Method for fabricating Z-axis vertical launch

A RAMP-radio frequency (RAMP-RF) assembly is provided and includes an RF panel including a microstrip interface, a plate including a stripline interface and a microstrip-to-stripline transition element operably connectable to the microstrip interface and to the stripline interface.

Radio-frequency (RF)-interface and modular plate

A radio frequency connector includes a substrate, a first ground plane disposed upon the substrate, a signal conductor having a first contact point, with the first contact point being configured to electrically mate with a second contact point, and a first ground boundary configured to electrically mate with a second ground boundary, with the first ground boundary being formed as an electrically continuous conductor within the substrate.

Method of manufacturing radio frequency interconnections

A process of fabricating an electromagnetic circuit includes providing a first sheet of dielectric material including a top surface having at least one conductive trace and depositing a solder bump on the at least one conductive trace. The process further includes applying a second sheet of dielectric material to the first sheet of dielectric material with bond film sandwiched in between, the second sheet of dielectric material having a through-hole providing access to the solder bump. The process further includes bonding the first and second dielectric materials to one another and removing bond film resin from the solder bump. The process further includes machining the solder bump by the drilling or milling process to achieve a desired amount of solder in the solder bump.

Process for removing bond film from cavities in printed circuit boards

A communications array includes a support structure configured to array elements, and a plurality of array elements supported by the support structure. Each array element is fabricated from an advanced manufacturing techniques (AMT) process. The support structure may be fabricated from a printed circuit board (PCB) or similar dielectric material. Each array element may include a radiator and/or a beamformer manufactured using the AMT process. The communications array further may include a copper vertical launch (CVL) and/or an electromagnetic boundary.

Advanced communications array

An array includes a support structure configured to support columns of beamformer assemblies, and a plurality of beamformer assemblies supported by the support structure. Each beamformer assembly includes at least one beamformer having at least one first beamformer segment and at least one second beamformer segment configured to interconnect with the first beamformer segment.

Interlocking modular beamformer

A process of fabricating a circuit includes providing a first sheet of dielectric material including a first top surface having at least one first conductive trace and a second sheet of dielectric material including a second top surface having at least one second conductive trace, depositing a first solder bump on the at least one first conductive trace, applying the second sheet of dielectric material to the first sheet of dielectric material with bonding film sandwiched in between, bonding the first and second sheets of dielectric material to one another, and providing a conductive material to connect the first solder bump on the at least one first conductive trace to the at least one second conductive trace.

Preparation of solder bump for compatibility with printed electronics and enhanced via reliability

Apparatus for fabricating Z-axis vertical launch within a printed circuit board

A method includes blending a dielectric material including a titanate with a carbon-based ink to form a modified carbon-based ink. The method also includes printing the modified carbon-based ink onto a structure. The method further includes curing the printed modified carbon-based ink on the structure at a temperature that does not exceed about 250&#xb0; C. In addition, the method includes processing the cured printed modified carbon-based ink to form a thick film resistor. Blending the dielectric material with the carbon-based ink causes the modified carbon-based ink to have a resistivity that is at least double a resistivity of the carbon-based ink.

Growing community of inventors

Lowell, MA, United States of America

Andrew R Southworth