3dlabs Inc., Ltd.

Andrew Peter Maund

David Robert Baldwin

Nicholas J N Murphy

Neil F Trevett

Malcolm E Wilson

John W Neave

Simon James Moore

Steve Cooper

Paul Pontin

A specialized processing chip (e.g. a graphics accelerator) in which the host interface provides access to the diagnostic registers in most of the complex logic on the chip, except for the host interface itself. This advantageously permits the host CPU to obtain direct access to register contents in the specialized chip.

In-circuit test using scan chains

In a demand-paged virtual memory system, the pages are arranged in the virtual memory space in groups. In order to translate an address from the virtual address space to a physical memory address space, the virtual group address component is input to a contents addressable memory (767), which outputs a group code (767), and the group code and virtual page address component (768X,Y) are input to a RAM page table (750) which outputs the page address. When the physical memory capacity is substantially smaller than the virtual address space, the CAM provides a large saving in page table size. In the case where the data-elements provide a plural-dimensional representation, for example as in pixel data, the pages include data elements which are contiguous in each of the plural dimensions in order to reduce the amount of page-swapping between the physical memory and a paging memory. The data-elements in the physical memory are accessible in parallel as contiguous patches. In order to allow parallel access of patches which are not aligned with respect to a page and therefore may fall partly on the edge of one page and partly on the edge of a page which is contiguous with the first page in the virtual memory but not in the physical memory, the addressing system determines whether a patch to be accessed has data-elements in different pages, and may then modify the addresses to the physical memory.

Virtual memory system

Growing community of inventors

Shepperton, United Kingdom

Andrew Peter Maund