Enmotus, Inc.

Teridian Semiconductor Corporation

Conexant Systems, Inc.

Smart Modular Technologies, Inc.

Tdk Semiconductor,corp.

Andrew Mills

Marshall Lee

Ralph Andersson

Michael Nootbaar

David Rosky

Michael Behrin

Anthony Worsham

Torry Steed

Migrating data between byte-addressable and block-addressable storage devices in processor-based devices is disclosed. In this regard, a processor of a processor-based device is communicatively coupled to both a byte-addressable storage device and a block-addressable storage device. The processor is configured to present the byte-addressable storage device and the block-addressable storage device as a single virtual storage device (i.e., as either a byte-addressable virtual device or a block-addressable virtual storage device). The processor is further configured to identify a low-activity region in the byte-addressable storage device, and to also identify a high-activity region in the block-addressable storage device. The processor then exchanges a first storage region corresponding to the low-activity region and comprising a memory address region of the byte-addressable storage device with a second storage region corresponding to the high-activity region and comprising a block region of the block-addressable storage device.

Migrating data between byte-addressable and block-addressable storage devices in processor-based devices

Systems and methods for memory snapshots are disclosed. In particular, a memory device may include a volatile section and a backup persistent storage section. A snapshot manager circuit is positioned between a host control circuit or central processors. This snapshot manager circuit acts as a memory virtualization layer within the memory device and may use a redirect on write type command to put a snapshot of actively changed memory to a reserved memory area in the volatile section. A background function may copy the snapshots to the persistent storage section. Because the snapshot manager circuit is in the hardware memory access layers of the memory device, operation of the application is not interrupted or paused to access the specific memory sections. Further, snapshots are more readily available in the memory used by the host control circuit.

Systems and methods for memory snapshotting

A method of operation of a storage system includes: establishing a virtual storage deviceincluding allocating portions of a storage media, a storage media, a storage media N, or a combination thereof including writing data blocks to the virtual storage device; determining a pinning status for the data blocks; pinning the data blocks to a logical block address (LBA) range until the pinning status indicates an unpinning of the data blocks; and relocating the data blocks to the storage media, the storage media, the storage media N, or the combination thereof within the virtual storage devicewhen the pinning status indicates unpinned.

Storage system with file priority mechanism and method of operation thereof

A method of operation of a storage system includes: collecting performance data including periodically sampling a non-volatile (NV) device for loading a statistics and capacity usage table; comparing a policy and threshold table to the statistics and capacity usage table; and configuring a virtual disk from a network of storage application servers for supplementing or replacing the NV device that exceeded the policy and threshold table while an application continues to utilize the NV device.

Storage system with allocated storage device mechanism and method of operation thereof

A method of operation of a storage system includes: identifying a low activity region in the first tier storage and a high activity region in the second tier storage; exchanging data of the high activity region with the data of the low activity region; and wherein protecting the data comprises: copying the low activity region to a reserved section; updating a new physical address of the low activity region in a virtual-to-physical table; copying the high activity region to the location in the first tier storage previously occupied by the low activity region; and updating the new physical address of the high activity region in the virtual-to-physical table and mapping the physical block region, originally allocated to the high activity region, to the reserved section.

Storage system with data management and protection mechanism and method of operation thereof

A method of operation of a storage system includes: accessing a storage tier manager coupled to a first tier storage and a second tier storage; identifying a low activity region in the first tier storage and a high activity region in the second tier storage; and exchanging a physical block region corresponding to the high activity region with the physical block region corresponding to the low activity region by the storage tier manager.

Storage system with data management mechanism and method of operation thereof

A method () of operation of a storage system includes: partitioning a first virtual disk volume by allocating a first portion, a first low performance storage capacity, and a first reserved capacity; establishing, based on a user policy register, a partition bias for the first virtual disk volume; and adjusting a capacity of the first portion and the first low performance storage capacity based on usage statistics, the partition bias, and limiting the capacity adjustment by a dynamic partitioning module.

Storage system with load balancing mechanism and method of operation thereof

A method of operation of a storage system includes: establishing a first virtual disk volume including allocating a first portion and a first low performance storage capacity; generating a usage statistics for the first virtual disk volume; and calculating a first trend line for adjusting the first portion and the first low performance storage capacity based on the usage statistics.

A method for maintaining the states of a receiver during the silent line state of a network device operating in a low power link suspend mode is presented. Accordingly, a method of freezing the states of the equalizer and keeping the receiver clock locked to a frequency that is approximately equal to that of the input data while providing for rapid adjustment to the phase and thus recovery of the input data is presented. During Silent Line State (SLS), the receiver states are frozen using methods that avoid parasitic decay. Also, the receive clock phase lock loop is locked onto the local transmit clock since the local transmit clock has a frequency approximating the incoming data frequency. During the SLS, the transmitter of the remote network device may have been turned off to conserve power therefore the receiver has no way of immediately knowing the phase of an incoming data. Thus, in order to prevent loss of data, the receiver loops of the receiving network device are trained to the frequency of the transmitting remote network device using periodic Link Suspend packets. Thus, in most cases, only the phase of the incoming signal need be acquired when data arrives. The phase may be quickly acquired using loop bandwidth shift methods whereby the receive clock phase lock loop bandwidth is increased to a value that aids rapid acquisition of the input clock and then, after acquisition, the bandwidth is shifted to a low value to enhance noise rejection during tracking.

Apparatus and method for freezing the states of a receiver during silent line state operation of a network device

A method and apparatus for handling data during link suspend pulse and the silent line state of a network device operating in a low power link suspend mode is presented. Accordingly, a new generation of network devices capable of operating in both the full power operational mode of prior art network devices, and a low power 'link-suspend' operational mode are presented. The low power 'link-suspend' (LS) mode reduces the power consumption of a LAN communications link at the physical layer by eliminating the need to continuously transmit standard idles to maintain link between two linked partners. In the LS mode, a low duty cycle &#x201c;link-suspend-packet&#x201d; (LSP) is transmitted between periods of silent line state (SLS). During the SLS, which is a non-data transmission period, the transmitter may be turned off to conserve power therefore preventing the receiver from immediately knowing the phase of an incoming data. Thus, in order to prevent loss of data, the LSPs serve to maintain link and provide information necessary to train the receiver loops so that they can quickly lock onto the incoming data. LSPs are specially constructed so that they can serve as part of the data preamble when the network devices are operating in the link suspend mode. Therefore, the nature of the LSPs is that they are compatible with the standard protocol requirements for data transmission.

Method and apparatus for handling link suspend pulse and silent line state transitions of a network device

The invention provides a method for initializing a link suspend device for optimum receive recovery. A method for negotiating link parameters to facilitate rapid recovery of the input data from a silent line state is described. The invention can be applied to network devices in point-to-point data communications links capable of operating in a low power link suspend mode.

Method for initializing a link suspend device for optimum receive recovery

A method and apparatus for transparent implementation of link-suspend capabilities in network devices is presented, which is capable of operating in full or substantially full power operational mode, as well as in a low power 'link-suspend' operational mode. The low power 'link-suspend' (LS) mode reduces the power consumption of a LAN communications link at the physical layer by eliminating the need to transmit continuous standard idles to maintain link between two linked partners. In the LS mode, a low duty cycle &#x201c;link-suspend-packet&#x201d; (LSP) is transmitted between periods of silent line state (SLS). During the SLS, which is a non-data transmission period, the transmitter may be turned off to conserve power. The transmitter power is turned back on when it is time to transmit LSPs or data.

Method and apparatus for transparent implementation of link-suspend capabilities in network devices

A link-suspend operation between network nodes in a point-to-point data communications link is presented. Individual network links will have a full power operational mode for supporting full high-bandwidth communication, and a low power &ldquo;link-suspend&rdquo; (LS) operational mode for temporary operation when only limited communication is occurring. The communications link is maintained, while cycling transmitter power on and off during idle periods with a duty cycle that substantially reduces physical layer device (PHY) power, using LSPs. LS mode may be negotiated by advertising capabilities between two network devices. Thus, PHYs at either end of a link can notify the other of the capability to support a LS mode of operation and can negotiate parameters for communications using the LS mode. Further, transmitting and receiving continuous idles, valid data frames, and Wake-on LAN (WOL) packets is supported. Similarly, notification of &ldquo;wake-up&rdquo; schemes and detection of suspended WOL network device is supported.

Method and apparatus for supporting physical layer link-suspend operation between network nodes

A multi-communication rate switching physical device for a port of a mixed communication rate Ethernet repeater network. The present invention includes a physical device for recovering bits from a wire connection (e.g., fiber, twisted pair, etc.) that is coupled to computer system adapter. The physical device can be implemented on a single chip integrated within an Ethernet repeater hub within each hub port. The physical device chip of the invention includes a front end multiplexer coupled to channel information between a 10 Base T physical device circuit and a 100 Base T physical device circuit, depending on the result of an auto-negotiation circuit also on the physical device chip. The physical device chip also advantageously employs a second, back end multiplexer, that is coupled to channel data between either the 10 Base T physical device circuit or the 100 Base T physical device circuit and one of a multiple of media independent interfaces (MIIs). The back end multiplexer is controlled by a combination of signals including the auto-negotiation circuit result and a system management interface override signal. By providing multiple MII (or giga MII) interface connections, the invention provides a low cost solution to allow the associated port to be automatically associated with a number of different collision domains within the Ethernet network. Port assignment to one domain or another is flexible and can be based on: (1) the result of an auto-negotiation session; (2) a manual override; or (3) detected errors in the fastest attempted rate.

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Coto de Caza, CA, United States of America

Andrew Mills