Sony Electronics Inc

Andrew Leary

O F Morgan

Michael Polatnick

Each of the signal processing units of a digital signal processing system is provided with a programmable timing delay unit having identical programming interface to control the signal timing of its signal processing circuitry. Additionally, a central timing unit is provided to the digital signal processing system to provide signal timing control inputs to the programmable timing delay units. Furthermore, a routing switcher is provided to the digital signal processing system to control configuration of the signal path, i.e. the order in which the signal is processed by all or a subset of the signal processing units of the digital signal processing system. As a result, the individual signal processing units are relieved the burden of providing circuitry for timing control, delay equalization and timing derivation. Furthermore, the timing offsets for the individual signal processing units may be easily recomputed for any signal path, thereby improving the reconfiguration flexibility of the digital signal processing system.

Growing community of inventors

Palo Alto, CA, United States of America

Andrew Leary