Digital Equipment Corporation

Quantum Corporation

Maxtor Corporation

Matsushita-kotobukie Electronics Industries, Ltd.

Andrew L Wu

Paul J Duval

Lawrence G Neumann

Vijay K Basra

E William Bruce, Ii

Jeffrey G Greiman

Thomas Ferraguto

Donald W Smelser

Donald C Pierce

Sharat Batra

Warren W Goller

Stephen R Coe

Derrick D DaCosta

Martin W Czekalski

John O'Dea

Bruce Provencher

In one aspect described herein, a read head having one or more magnetoresistive (MR) sensors (or devices) is provided. In one example, the read head includes an MR sensor and an insulator layer disposed at the same level as the MR sensor. The read head further includes a bearing surface, wherein the insulator layer forms a portion of the bearing surface and is disposed between a surface of the MR sensor and the bearing surface to provide protection for the MR sensor from exposure to the bearing surface. The MR sensor may include a stack of thin-film layers to form an AMR, GMR, or TGMR sensor element. The stack may further include a slanted surface portion, wherein the insulator layer is disposed on the slanted surface portion, thereby recessing the MR sensor from the bearing surface.

Magnetic recording heads with bearing surface protections and methods of manufacture

According to one aspect, an exemplary method for manufacturing a magnetic head includes forming a plurality of magnetoresistive devices, a reference device, and a monitoring device, where the reference device includes a desired stripe height less than the magnetoresistive devices and monitoring device. Material is removed from the air/tape bearing surface, e.g., by lapping, thereby reducing the stripe height of the magnetoresistive devices and monitoring device. A characteristic of the reference device, e.g., resistance, voltage, or the like, is compared with a similar characteristic of the monitoring device, wherein the characteristic of the monitoring device varies as material is removed. Material may be removed from the bearing surface until the characteristic of the monitoring device and the reference device are substantially equal, at which time, the stripe height of the monitoring device and magnetoresistive devices are substantially equal to that of the reference device.

Methods of manufacturing magnetic heads with reference and monitoring devices

A flux guide protected magnetoresistive sensor in a tape drive read/write head is presented. The magnetoresistive sensor has a tape bearing surface, and includes a magnetoresistive sensing element and a flux guide disposed on a surface of the magnetoresistive sensing element to form a portion of the tape bearing surface.

Method of producing flux guides in magnetic recording heads

A recording head pole production process, and a pole made by the process, in which a combination of wet and dry etching steps are utilized to advantageously provide an undercut in the relatively high magnetic moment material beneath a photoresist area used to define the pole such that any re-deposited layer of material which occurs on the sides of the pole and photoresist area during the dry etching operation is advantageously rendered substantially discontinuous, or weakly linked, and the re-deposited material remaining on the pole itself following a photoresist strip can then be removed by being subjected to a stream of gaseous particles and ultimately carried away by the accompanying gas stream itself. In a particular embodiment disclosed herein the relatively high magnetic moment material may comprise a sputter deposited layer of cobalt-zirconium-tantalum (CoZrTa), iron-aluminum-nitride (FeAlN), iron-tantalum-nitride (FeTaN), iron-nitride (FeN) or similar materials. The stream of gaseous particles may be formed utilizing the expansion of a gaseous material, such as liquid carbon dioxide (CO ), through a nozzle directed at the re-deposited material remaining on the pole following the photoresist strip operation.

Process for producing magnetic head poles utilizing sputtered materials and a recording head made thereby

Process for producing magnetic recording head poles utilizing sputtered materials and a recording head made thereby

A pole-trimmed writer for an MR read/write data transducer which may be produced without significant re-deposition of Al.sub.2 O.sub.3 or NiFe on the sides of the writer poles. The process disclosed herein advantageously provides an upper (top) pole which is processed to project a pair of relatively thin, laterally extending lower flanges, prior to the use of the upper pole as a mask to subsequent ion milling of the lower pole, or shared shield. In a preferred embodiment, the process for producing the flange is implemented in conjunction with the deposition of a single copper (Cu) or dual Al.sub.2 O.sub.3 and chromium (Cr) overlayers formed on the upper pole seed layer followed by the top pole formation and selective removal of a predetermined amount of the underlying portions of the gap material prior to a subsequent ion milling operation and further processing of the read/write head.

Process for producing a pole-trimmed writer in a magnetoresistive

A magnetic head 50 comprises a substrate 55 including a magnetoresistive sensor 60 having (i) a magnetoresistive element 65 with a top surface 105, and (ii) an electrically conducting portion 75. Conductor leads 70 are electrically connected to the electrically conducting portion 75 of the magnetoresistive sensor 60. First and second dielectric isolators 100, 125 electrically isolate the conductor leads. The dielectric isolators 100, 125 terminate adjacent to, and substantially without covering, the top surface of the magnetoresistive element. Preferably, the first dielectric isolators 100 comprise (i) an inner edge 115 abutting and covering the peripheral edge 110 of the magnetoresistive sensor, and (ii) an upper surface 120 substantially in the same plane as the top surface 105 of the magnetoresistive sensor. The magnetic head 50 has superior magnetic data reading accuracy and reliability.

Magnetoresistive head having electrically isolated conductor leads

A method of making a thin film magnetic head having multi-layer coils wherein a raised insulative photoresist spiral pattern having undercut sidewalls is formed. Two layers of coils are fabricated simultaneously by evaporating metal onto the upper surface of the spiral pattern and in spaces between the pattern. The cross-section of the bottom coil decreases in width with an increase in height. The coils are insulated from each other with a layer of insulative photoresist.

Method of making a thin film magnetic head having multi-layer coils

A thin film magnetic head, and process for making the same, features a thin film magnetic transducer formed from multiple layers of film and having a magnetic yoke interacting with an electrical coil. The yoke has multiple magnetic flux circuits, deposited on multiple layers of film, encircling the center of the transducer and connected together by proximal and distal vias. A coil has multiple turns intertwined with the yoke, passing between the distal and proximal vias so that the distal vias are exterior to the coil and the proximal Vias are interior to the coil, to provide at least four magnetic flux interactions between the coil and the yoke. In preferred embodiments at least one layer of the film is deposited with at least two pole pieces having different easy axis orientations. In other preferred embodiments at least one distal via is configured as an elongated 'flux strap' for conducting magnetic flux along the length of the via in a direction oblique to the easy axis of either pole piece coupled together by the magnetic flux strap.

Thin-film magnetic transducer with a multitude of magnetic flux

A low-profile, high-density package for intergrated circuit chips is provided. A first multichip memory module includes first and second interconnect members having low-profile memory chips mounted on a first side of each member. Low-profile edge clips are employed to mechanically connect a second side of the second member to a second side of the first member, and to electrically connect the first sides of the members to a first surface of a circuit board. Likewise, a second multichip memory module includes first and second interconnect members having low-profile memory chips mounted to a first side of each member. Low-profile edge clips are employed to mechanically connect the second sides of the members, and to electrically connect the first sides of the members to a second surface of the circuit board. A thermal management technique that distributes thermal loads is thereafter applied to create a high-density package capable of insertion into a standard computer backplane and cabinet.

High density memory array packaging

A high-density memory module has thirty-two memory integrated circuit chips, sixteen decoupling capacitors, and two resistors mounted on a double-sided multi-layer printed wiring board having a series of edge terminals for connection to a motherboard. One side of the board has a first 2.times.8 rectangular matrix of the chips, and the other side of the board has a second 2.times.8 matrix of the chips. The chips are grouped into four 'strings,' each of which includes eight chips which receive the same row address strobe and column address strobe. Each string is selected by a unique row address strobe. All four strings share a common data bus. Two of the strings share a first column address strobe and a first address bus, and the other two strings share a second column address strobe and a second address bus, to facilitate four-way interleaved memory access. Address, data, power, and ground terminals are distributed and dispersed along the series of edge terminals, but terminals for one address bus is disposed between a first half and a second half of the terminals for the other address bus. One of the two resistors is used for indicating the type of the memory chips in the memory module, and the other resistor is interconnected with similar resistors in other memory modules on the motherboard to provide a combined resistance indicating the number of memory modules on the motherboard.

High-density double-sided multi-string memory module with resistor for

A compact high-density packaging arrangement for high-performance semiconductor devices includes a plurality of high-performance semiconductor chips connected to a multilayer daughter substrate member using a bare chip assembly technique known as bonded pin technology. Internal bonded pins are formed on bonding pads of the chips and soldered to conductive pads in solder wells located on the daughter substrate to provide a first level of interconnection for the chips. A larger, multilayer mother substrate member has a plurality of apertures formed in one surface thereof. These apertures are terminated by a top side of a metallized base layer of the substrate. An opposite surface of the mother substrate, i.e. a bottom side of the base layer, is affixed in thermal conductive relation to a metallic cold plate adapted for receiving a cooling fluid. External bonded pins are formed on bonding pads of the daughter substrate and inserted into corresponding solder wells located on the mother substrate. Concurrently, the bare chips are situated into the apertures in intimate thermal conductive relation to the cold plate via the metallized base layer. The pins are then soldered to conductive pads in the solder wells, thereby providing a second level of chip interconnection when other chip-populated daughter substrates are mounted thereon.

Compact, high-density packaging apparatus for high performance

A method for fabricating a multilayer interconnection system that is fully planar with completely sealed and corrosion resistant conductors separated by dielectric material.

Multilayer interconnection system for multichip high performance

An integrated circuit having a plurality of devices on a substrate is disclosed, wherein a plurality of metallization layers, separated by a plurality of insulating layers, are used to interconnect the devices. Each metallization layer is recessed in an upper portion of a corresponding dielectric layer. A metallization layer is connected to a lower one, or, in the case of the first metallization layer, to the devices, by solid contacts extending through via windows in the lower portion of the corresponding dielectric layer. A method of manufacturing such an integrated circuit is also disclosed, whereby each layer is formed in two steps. First, the lower portion of the insulating layer is deposited, the contact pattern opened and the vias windows filled with metal to provide contacts even with the top surface of the lower portion of the insulating layer. Then, the upper portion of the insulating layer is deposited over the lower portion, the metallization pattern opened, and the pattern filled with metal up to and even with the top surface of the upper portion of the insulating layer. The metal filling step is produced by depositing a metal layer over the corresponding portion of opened insulating layer, masking the opened regions and selectively and directionally removing the unprotected metal layer.

Growing community of inventors

Shrewsbury, MA, United States of America

Andrew L Wu