Raytheon Company

Andrew L Martin

David W Palmer

Allen M Schwartz

The frequency of a clock signal is compared to a predetermined range. If the measured frequency is outside the range, a system controller determines if a current operating state of the overall system allows for the internal clock to be adjusted back into compliance. If the controller determines that the current system state allows for the change, then a control signal to the internal clock signal source is changed by the smallest increment available, either to increase or decrease the frequency. If the internal clock signal is out of the desired range, and the system controller does not decide to modify the frequency, the controller may increase the size of the range by decreasing the lower bound and/or increasing the upper bound.

Clock frequency control system

System and method for implementing a secure processor data bus are described. One embodiment is a circuit comprising a processor disposed in a processor partition, the circuit further comprising a first set of peripherals disposed in a first peripheral partition; a second set of peripherals disposed in a second peripheral partition physically isolated from the first peripheral partition; a first state control register for controlling access to the first set of peripherals by the processor; and a second state control register for controlling access to the second set of peripherals by the processor. When the first and second state control registers are in a first mode of operation, the processor has read and write access to the first set of peripherals and write only access to the second set of peripherals. When the first and second state control registers are in a second mode of operation, the processor has read and write access to the second set of peripherals and read only access to the first set of peripherals.

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Waltham, MA, United States of America

Andrew L Martin