Nortel Networks Corporation

Ciena Corporation

Andrew L Jarabek

Aris Tombul

Daniel Rivaud

Mark Brian Carson

Anthony Mayenburg

Fabien Colton

David G Stuart

James Tierney

Robert G Gibbins

Warren Lau

Karl Hammermeister

Ho Nguyen

The solution of the present disclosure connects the power in parallel distribution chains. A horizontal pizza box in the middle of the equipment stack represents the power box (PB), which houses the power modules (PMs), such as the power input modules (PIMs) or the power supply units (PSUs). The PMs in the PB are connected to the office power source(s), and the PB supplies power to the parallel distribution chains (A' and B&#x2032;). The parallel distribution chains are composed of jumper segments that are based on busbar-like technology, with each jumper segment being the length of the distance between coupled boxes. Any box can be removed without disrupting either distribution chain. Advantageously, the jumper segments are touch-proof, from a safety perspective. Thus, instead of a jumper created using a cable, PCB, etc., or a jumper composed of a custom molded back-to-back connector, the jumpers are based on busbar-like technology.

Stackable telecommunications equipment power distribution assembly and method

The present disclosure provides a fabric ingress scheduler and method that distributes ingress packet traffic in a time division multiplex (TDM) system, both fabric interface aggregate and per connection, deterministically across fabric paths. Advantageously, the fabric ingress scheduler and method minimizes fabric latency and prevents fabric interface head-of-line blocking. The fabric ingress scheduler and method utilizes the fact that each connection flow has a known maximum rate which must be reserved through the fabric for prevention of data loss (essentially circuit switching using a packet fabric). In exemplary embodiments, the fabric interface supports per packet fabric path selection. Generally, the fabric ingress scheduler and method generally provides a deterministic scheduling of ingress packets to fabric paths.

Time division multiplex packet fabric ingress scheduler and method

A method and apparatus for efficient provisioning of a VT/TU cross-connect includes checking a state of a control bit that specifies whether to assemble an output from multiple virtual tributary (VT1.5/VT2) or tributary unit (TU11/TU12) connections or handle the output as an synchronous transport signal (STS) or administrative unit (AU-3/AU-4) connection, and switching a predetermined number of entries together based on a state of the control bit.

Efficient provisioning of a VT/TU cross-connect

A method and apparatus for managing latency includes receiving data from synchronous transport signals (STS) and virtual tributary (VT) sources, providing a provisioning bit for each output associated with a memory, and adjusting a pointer for the VT sources based on the provisioning bit such that the STS and VT outputs are synchronized.

Managing payload specific latencies in a cross-connect system

A technique for provisioning cross-connects in network switching environment includes receiving a portion of the an input data stream including having header data and the payload data, the payload data occurring at a first offset relative to the header data and generating a delayed version of the portion of the input data stream. The technique also includes generating a portion of a retimed data stream by selecting between the portion of the input data stream and the delayed version of the portion of the input data stream, the retimed data stream including the header data and the payload data, the payload data occurring at a second offset relative to the header data.

Managing data in a subtended switch

A method and apparatus for detecting errors in a memory includes generating a first check word based on incoming data and generating a second check word based on stored data. The method includes comparing the first check word to the second check word, generating a comparison result, and indicating a failure based on the comparison result.

Memory integrity self checking in VT/TU cross-connect

A technique for provisioning cross-connects in network switching environment includes writing a first set of data into a first memory element during a first time interval and writing a second set of data into a second memory element during a second time interval. The technique reads a portion of the first set of data from the first memory element during the second time interval and reads a portion of the second set of data from the second memory element during a third time interval, and determines the first, second, and third time intervals based on a format of the sets of data, with the first time interval ending before the second time interval begins, and the second time interval ending before the third time interval begins.

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Nepean, Canada

Andrew L Jarabek