International Business Machines Corporation

Motorola Corporation

Freescale Semiconductor,inc.

Andrew Kenneth Martin

Damir Anthony Jamsek

Kanak Behari Agarwal

Daniel Frank Moertl

Robert Edward Galbraith

Alan J Drake

Charalampos Pozidis

Chandler Todd McDowell

Aj KleinOsowski

Robert K Montoye

Harm Peter Hofstee

Wendy Ann Belluomini

Joerg-Stephan Vogt

Reiner Rieke

Steven Paul Norgaard

Jeremy T Ekman

Gunnar Von Boehn

Gerald Mark Grabowski

Abby Harrison

Nikolaos Papandreou

Thomas Mittelholzer

Charles John Camp

Jun Sawada

Rick A Weckwerth

Milos Stanisavljevic

Magdy Samuel Abadir

H Peter Hofstee

Carl P Pixley

Mussie T Negussie

Narayanan Krishnamurthy

Matthew J Kaufmann

Aj Klein Osowski

Li-Chung Wang

Narayanan Krishamurthy

A memory system and method for storing data in one or more storage chips includes: one or more memory cards each having a plurality of storage chips, and each chip having a plurality of dies having a plurality of memory cells; a memory controller comprising a translation module, the translation module further comprising: a logical to virtual translation table (LVT) having a plurality of entries, each entry in the LVT configured to map a logical address to a virtual block address (VBA), where the VBA corresponds to a group of the memory cells on the one or more memory cards, wherein each entry in the LVT further includes a write wear level count to track the number of writing operations to the VBA, and a read wear level count to track the number of read operations for the VBA mapped to that LVT entry.

Logical to virtual and virtual to physical translation in storage class memory

A method and system for collecting diagnostic data from a storage class memory chip is disclosed. The method includes performing a scrub process on at least a portion of the storage class memory by: removing the portion of the storage class memory from use, wherein the portion comprises a plurality of memory locations, executing a first write operation to write a first pattern on each of the plurality of memory locations, executing a first read operation to obtain a first set of data written on each of the plurality of memory locations, analyzing the first set of data written on each of the plurality of memory locations to determine the number of stuck-at faults in the portion, and updating one or more counters in an error rate table (ERT) to indicate the number of stuck-at faults.

Scrub management in storage class memory

A memory system and method for storing data in one or more storage chips is disclosed. The memory system includes one or more storage dies included in each storage chip and a controller. Each of the plurality of storage dies further comprises one or more media replacement unit (MRU) groups. The controller includes a translation module, the translation module further comprising: a chip select table (CST) configured to identify one or more valid storage chips during translation for performing a read/write operation, and a media repair table (MRT) corresponding to each of storage chips, each MRT configured to identify one or more storage dies during translation for performing a read/write operation.

Virtual to physical translation and media repair in storage class memory

Techniques for persisting a logical address-to-virtual address table in a solid state storage device are presented. An example method includes receiving a request to write data to a logical block address (LBA) in a memory component of the solid state storage device. The data is written to a location identified by a virtual block address (VBA) in the solid state storage device. The VBA is stored in a rotating dump table in a reserved logical unit of the solid state storage device. A mapping between the LBA and the VBA is stored in a rotating journal table located in the reserved logical unit. The rotating journal table is buffered such that a number of journal entries are stored in a buffer until a threshold number of journal entries are committed to the rotating journal table. A pointer to a current address in the rotating journal is stored in the buffer.

Persistent logical to virtual table

An approach is provided in which a source system selects a symbol in a first bit stream that is partitioned into at least a first data chunk and a second data chunk. The beginning of the selected symbol resides in the first data chunk. The source system generates a first pull timing indicator in response to determining that at least a portion of the selected first symbol resides in the second data chunk. The source system generates a multiplexed bit stream by combining the first bit stream with a second bit stream based on the first pull timing indicator and transmits the multiplexed bit stream to a destination system.

Encoding variable length symbols to enable parallel decoding

An approach is provided in which a source system partitions multiple symbol sets into multiple fixed width data chunks. During the partitioning, the source system creates symbol boundary information corresponding to symbols in the symbol sets relative to boundaries of the fixed width data chunks. In turn, the source system combines the fixed width data chunks into a multiplexed bit stream based on the symbol boundary information and provides the multiplexed bit stream to a destination system.

A hardware accelerator receives a request to decompress a data stream that includes multiple deflate blocks and multiple deflate elements compressed according to block-specific compression configuration information. The hardware accelerator identifies a commit point that is based upon an interruption of a first decompression session of the data stream and corresponds to one of the deflate blocks. As such, the hardware accelerator configures a decompression engine based upon the corresponding deflate block's configuration information and, in turn, recommences decompression of the data stream at an input bit location corresponding to the commit point.

Efficient context save/restore during hardware decompression of DEFLATE encoded data

Mechanisms are provided, in a data processing system, for accessing a memory location in a physical memory of the data processing system. With these mechanisms, a request is received from an application to access a memory location specified by an effective address in an application address space. A translation is performed, at a user level of execution, of the effective address to a real address table index (RATI) value corresponding to the effective address. At a hardware level of execution, a lookup operation is performed that looks-up the RATI value in a real address table data structure maintained by trusted system level hardware of the data processing system, to identify a real address for accessing physical memory. A memory location in physical memory is thereafter accessed based on the identified real address.

Application-managed translation cache

A method of decoding data includes: receiving an encoded data stream transmitted as a plurality of variable length symbols; dividing the data stream into a sequence of blocks, each block having a sequence of adjacent bit positions starting a first bit position and ending with a last bit position; pre-processing each block prior to fully decoding each block, wherein pre-processing includes, for each block, selecting a bit position in a current block and determining a starting position of a first symbol in an adjacent block based on the selected bit position, wherein determining is initially performed for the last bit position in the current block, and is repeated sequentially for each preceding bit position through and including the first bit position; and fully decoding each block by decoding a first block starting at the first bit position and decoding each adjacent block starting at the starting position.

High throughput decoding of variable length data symbols

A mechanism is provided for recirculating transactions within a pipeline while reordering outputs. A set of transactions associated with a block of data is received and each transaction in the set of transactions is processed via the pipeline. For each transaction processed via the pipeline, responsive to the transaction exiting the pipeline, a determination is made as to whether the transaction needs further processing. Responsive to the transaction needing further processing, the transaction is re-circulated via the pipeline forming a recirculated transaction.

Reordering the output of recirculated transactions within a pipeline

An approach is provided in which in which a decoder pipeline receives a data stream that includes a stream of deflate blocks. The decoder pipeline decodes an end of block symbol included in one of the deflate blocks and identifies a recycle point in the data stream in response to decoding the end of block symbol. In turn, the decoder pipeline recycles pipeline data residing between the end of block symbol and the recycle point.

Hardware decompression of deflate encoded data with multiple blocks

Mechanisms are provided for decoding a variable length encoded data stream. A decoder of a data processing system receives an input line of data. The input line of data is a portion of the variable length encoded data stream. The decoder determines an amount of bit spill over of the input line of data onto a next input line of data. The decoder aligns the input line of data to begin at a symbol boundary based on the determined amount of bit spill over. The decoder tokenizes the aligned input line of data to generate a set of tokens. Each token corresponds to an encoded symbol in the aligned next input line of data. The decoder generates an output word of data based on the set of tokens. The output word of data corresponds to a word of data in the original set of data.

High bandwidth decompression of variable length encoded data streams

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Austin, TX, United States of America

Andrew Kenneth Martin