Western Digital Technologies, Inc.

Skyera, LLC

Sandisk Corporation

Kioxia Corporation

Sandisk Technologies Inc.

Samsung Electronics Co., Ltd.

Seagate Technology Incorporated

Toshiba Memory Corporation

Longitude Flash Memory Systems S.à R.l.

Andrew John Tomlin

Justin Cree Jones

Rodney Norman Mullendore

Sergey Anatolievich Gorobets

Radoslav Danilak

Alan David Bennett

Carlos J Gonzalez

Shai Traister

Reuven Elhamias

Jing Booth

Yosi Pinto

Mei-Man L Syu

William S Wu

Wesley G Brewer

Micky Holtzman

Alexander Paley

Dmitry Obukhov

Eugene Zilberman

Bum Suck So

Charles Michael Schroter

Johnny A Lam

Michael Anthony Moser

Daniel Edward Tuers

Michael Holtzman

Kamyar Souri

Guangming Lu

James J Walsh

Jack W Flinsbaugh

Paul Sweazey

Kent Douglas Anderson

Anantha Raman Krishnan

Jui-Yao Yang

Shayan Srinivasa Garani

Shafa Dahandeh

Fred Weber

Dennis S Ea

Hiren Desai

Justin M Jones

Leader Ho

Purvaja Narayanaswamy

Manoj Guthala

Mickael Holtzman

Various implementations described herein relate to systems and methods for managing metadata for conditional update, including adding conditional entry to a list in an in-memory journal for a conditional update associated with a garbage collection write, configuring a base entry in the list to point to the conditional entry, and in response to determining that the conditional update is resolved such that a physical location identified in the conditional entry is valid, freeing the conditional entry.

Conditional update, delayed lookup

A device for managing key-value (KV) data in non-volatile memory, includes a controller and volatile memory storing a hash table. The controller generates a first key from a KV pair, reads a first entry of the hash table based on the first key, reads, based on the first entry, a first page including a set of KV hash entries each containing a location of the non-volatile memory, determine whether the number of entries of the first page reaches a predetermined number, and in response to determining that the number of entries of the first page reaches the predetermined number, store KV data corresponding to the KV pair in a location of the non-volatile memory, write a KV hash entry containing the location of the non-volatile memory, and write a location of the KV hash entry in a second entry of the hash table.

System and method for efficient expansion of key value hash table

Various implementations described herein relate to systems and methods for managing metadata for an atomic write operation, including determining metadata for data, queuing the metadata in an atomic list, in response to determining that atomic commit has occurred, moving the metadata from the atomic list to write lookup lists based on logical information of the data, and determining one of metadata pages of a non-volatile memory for each of the write lookup lists based on the logical information.

Metadata management in non-volatile memory devices using in-memory journal

Various implementations described herein relate to systems and methods for managing metadata for power loss, including determining first metadata for first data, sending the first data to the non-volatile memory to be programmed to the first new locations of the non-volatile memory, and discarding the first metadata in response to detecting an imminent interruption to operations of the storage device. The first completion status for programming of the first data is unknown at the time of detecting the imminent interruption. The first data is read from first original locations of a non-volatile memory. The first metadata includes a first physical address for each of first new regions of the non-volatile memory.

Method for discarding garbage collection data during power loss

A device for processing commands to manage non-volatile memory includes a controller configured to obtain address information from a command, read, based on the address information, an entry of a metadata table, and determine, based on the entry of the metadata table, whether a metadata page corresponding to the address information is being processed by the controller. In response to determining that the metadata page corresponding to the address information is being processed, the controller determines a processing status of the metadata page, among a plurality of processing statuses, based on the entry of the metadata table and processes the command according to the processing status of the first metadata page. In response to determining that the metadata page corresponding to first address information is not being processed, the controller reads the metadata page from the non-volatile memory based on the entry of the metadata table.

System and method for scaling command orchestration through address mapping

Various implementations described herein relate to systems and methods for managing metadata using an in-memory journal, including determining metadata for data, storing the metadata in an in-memory journal, detecting an imminent interruption to operations of the storage device, in response to detecting the imminent interruption, program the in-memory journal to a non-volatile memory device of the storage device, detect that the operations of the storage device are being restored, and in response to detecting that the operations of the storage device are being restored, performing metadata update. The first data is read from first original areas of a non-volatile memory. The first metadata includes a first physical address for each of first new areas of the non-volatile memory. The metadata is programmed in a metadata area of the non-volatile memory device.

Method and apparatus of managing a non-volatile memory using an in-memory journal

A method for maintaining coherence for memory storage devices comprising a plurality of controllers in a side-by-side configuration. The method includes generating, by a first controller of the plurality of controllers, a first plurality of requests to access a first plurality of memory ranges; receiving, by the first controller from a second controller of the plurality of controllers, a second plurality of requests to access a second plurality of memory ranges; and serializing, by the first controller, the first plurality of requests and the second plurality of requests to generate a serialized request.

System and method for multichip coherence with side-by-side parallel multiport operation

A semiconductor storage device includes a controller including a data direct memory access (DDMA) controller. The controller receives a plurality of read commands segmented into data transfer descriptors associated with data tags from a host device and directs a plurality of the data transfer descriptors to the DDMA controller. The DDMA controller pre-fetches one or more descriptors from the host device associated with one or more of the plurality of data tags, a first data tag having an associated number of descriptors corresponding to contiguous blocks of memory. The DDMA controller determines if the associated number of descriptors satisfies a threshold, and, if it does not, moves the first data tag to a first list, when at a head of the first list moves the first data tag to a second list, and when at a head of the second list, transmits the data associated with the first data tag.

Method of out of order processing of scatter gather lists

In one embodiment, a method for reset and error handling comprises identifying at least one queue of a plurality of queues that is subject to a reset, halting fetching of commands from a host that are associated with the at least one queue subject to the reset, halting reallocation of command identifiers of completed commands to commands received from the host that are associated with the plurality of queues, identifying at least one command identifier associated with the at least one queue subject to the reset, updating an error state bitmap to indicate the at least one command identifier as a command in error, resuming reallocation of command identifiers of completed commands after updating the error state bitmap, and resuming fetching of commands from the host that are associated with the at least one queue subject to the reset after resuming reallocation of command identifiers of completed commands.

Reset and error handling in application specific integrated circuits

In one embodiment, a system comprises a plurality of hardware blocks, each of the plurality of hardware blocks configured to perform a function in response to a request associated with a command, an error queue manager configured to receive an error message from at least one of the plurality of hardware blocks and store the error message in an error queue, the error message including a command identifier of a command in error, and an error state manager including an error state bitmap, the error state bitmap storing an error state bit for each of a plurality of command identifiers, the error state bit indicating either command in error or command not in error; the error state manager configured to set the error state bit for the command identifier of the command in error to indicate command in error in response to an error state message, the error state message including the command identifier of the command in error.

Centralized error handling in application specific integrated circuits

Disclosed embodiments are directed to systems and methods for improving garbage collection and wear leveling performance in data storage systems. The embodiments can improve the efficiency of static wear leveling by picking the best candidate block for static wear leveling and/or postponing static wear leveling on certain candidate blocks. In one embodiment, one or more source blocks for a static wear leveling operation are selected based at least on whether the one or more blocks have a low P/E count and contain static data, such as data that has been garbage collected.

Systems and methods for improving garbage collection and wear leveling performance in data storage systems

A method of performing an atomic write command in a data storage device comprising a volatile memory and a plurality of non-volatile memory devices configured to store a plurality of physical pages. The method may comprise storing data in a plurality of logical pages (L-Pages), each associated with a logical address. A logical-to-physical address translation map may be maintained in the volatile memory, and may be configured to enable determination of a physical location, within one or more of the physical pages, of the data referenced by each logical address. The data specified by a received atomic write command may be stored one or more L-Pages. Updates to the entry or entries in the translation map associated with the L-Page(s) storing the data specified by the atomic write command may be deferred until all L-Pages storing data specified by the atomic write command have been written in a power-safe manner.

Atomic write command support in a solid state drive

Dynamically varying Over-Provisioning (OP) enables improvements in lifetime, reliability, and/or performance of a Solid-State Disk (SSD) and/or a flash memory therein. A host coupled to the SSD writes newer data to the SSD. If the newer host data is less random than older host data, then entropy of host data on the SSD decreases. In response, an SSD controller dynamically alters allocations of the flash memory, decreasing host allocation and increasing OP allocation. If the newer host data is more random, then the SSD controller dynamically increases the host allocation and decreases the OP allocation. The SSD controller dynamically allocates the OP allocation between host OP and system OP proportionally in accordance with a ratio of bandwidths of host and system data writes to the flash memory. Changes in allocations are selectively made in response to improved compression or deduplication of the host data, or in response to a host command.

Techniques for dynamically determining allocations and providing variable over-provisioning for non-volatile storage

Growing community of inventors

San Jose, CA, United States of America

Andrew John Tomlin