Qualcomm Incorporated

Toyota Motor Engineering & Manufacturing North America, Inc.

Andrew James Frantz

Joshua Stubbs

Norman S Gargash

Sean Sweeney

Tracy A Ulmer

Dianne D Horn

Hee Jun Park

Young Hoon Kang

Gabriel A Watkins

Inho Hwang

Grady L Caraway

Yiran Li

Derek Stanley Caveney

Brian J Salsbery

R Nicholson Gibson

Vinod Vijayarajan

Lorenzo Caminiti

Christopher A Barrett

Robert Nicholson Gibson

Jeffrey Clark Lovell

Sumant Madhav Paranjpe

Viswanathan Kumaragurubaran

Michael Abel

Joshua Hirsch Stubbs

A method and system for optimizing a core voltage level of a portable computing device ('PCD') and enhancing frequency performance of individual subcomponents are disclosed. A plurality of voltage values is determined for a plurality of subcomponents within the PCD. Next, a reduced set of voltage values may be calculated with a voltage aggregator based on the plurality of voltage values. An optimized voltage level for a shared power domain may then be determined by a voltage optimizer within the PCD from the reduced set of voltage values. A shared power domain may then be set to the optimized voltage level. Subsequently, an operating frequency of each subcomponent may be optimized with a frequency performance enhancer based on the optimized voltage level. An optimal power collapse duration may also be calculated by the frequency performance enhancer and set for each subcomponent from the optimal frequency.

Method and system for optimizing a core voltage level and enhancing frequency performance of individual subcomponents for reducing power consumption within a PCD

A method and system for optimizing a core voltage level of a portable computing device ('PCD') and enhancing frequency performance of individual subcomponents are disclosed. A plurality of voltage values for a plurality of subsystems is determined. At least one subsystem is a multiplexed subsystem. Next, a reduced set of voltage values is calculated based on the plurality of voltage values and an optimized voltage level is determined for a shared power domain. The shared power domain is subsequently set to the optimized voltage level. If the optimized voltage level is determined to exceed a required voltage level for the at least one multiplexed subsystem when it is running the plurality of processing engines, a subset of the plurality of processing engines may be identified to process a workload of the multiplexed system at a more efficient level of power consumption than the full plurality of processing engines.

A method and system for managing sleep states of a portable computing device are described. They include maintaining a sleep set of resource states and an active set of resource states in memory. A request may be issued for a processor to enter into a sleep state. This causes a controller to review a trigger set to determine if a shut down condition for the processor matches one or more conditions listed in the trigger set. Each trigger set may comprise a 'trigger event' that may allow a controller to select a specific resource set which is desired by a particular processor based on a trigger event detected by a system power manager. If a trigger set matches a shut down condition, then switching states of one or more resources in accordance with the sleep set may be made by the controller without using a software handshake.

Method and system for rapid entry into and for rapid exiting from sleep states for processors of a portable computing device

The aspects enable a computing device or microprocessor to determine a low power mode that provides the most system power savings by placing selected resources in a low power mode while continuing to function reliably, depending upon the resources not in use, acceptable system latencies, dynamic operating conditions (e.g., temperature), expected idle time, and the unique electrical characteristics of the particular device. Aspects provide a mechanism for determining an optimal low power configuration made up of a set of low power modes for the various resources within the computing device by determining which low power modes are valid at the time the processor enters an idle state, ranking the valid low power modes by expected power savings given the current device conditions, determining which valid low power mode provides the greatest power savings while meeting the latency requirements, and selecting a particular low power mode for each resource to enter.

Dynamic low power mode implementation for computing devices

The aspects enable a computing device or microprocessor to determine a low-power mode that maximizes system power savings by placing selected resources in a low power mode while continuing to function reliably, depending upon the resources not in use, acceptable system latencies, dynamic operating conditions (e.g., temperature), expected idle time, and the unique electrical characteristics of the particular device. The various aspects provide mechanisms and methods for compiling a plurality of low power resource modes to generate one or more synthetic low power resources from which can be selected an optimal low-power mode configuration made up of a set of selected synthetic low power resources.

Domain specific language, compiler and JIT for dynamic power management

Resource state sets corresponding to the application states are maintained in memory. A request may be issued for a processor operating in a first application state corresponding to the first resource state set to transition to a second application state corresponding to the second resource state set. A start time to begin transitioning resources to states indicated in the second resource state set is scheduled based upon an estimated amount of processing time to complete transitioning. A process is begun by which the states of resources are switched from states indicated by the first resource state set to states indicated by the second resource state set. Scheduling the process to begin at a time that allows the process to be completed just in time for the resource states to be immediately available to the processor upon entering the second application state helps minimize adverse effects of resource latency.

System for minimizing resource latency between processor application states in a portable computing device by scheduling resource state set transitions

A start time to begin transitioning resources to states indicated in the second resource state set is scheduled based upon an estimated amount of processing time to complete transitioning the resources. At a scheduled start time, a process starts in which the states of one or more resources are switched from states indicated by the first resource state set to states indicated by the second resource state set. Scheduling the process of transitioning resource states to begin at a time that allows the process to be completed just in time for the resource states to be immediately available to the processor upon entering the second application state helps minimize adverse effects of resource latency. This calculation for the time that the process should be completed just in time may be enhanced when system states and transitions between states are measured accurately and stored in memory of the portable computing device.

Conserving power through work load estimation for a portable computing device using scheduled resource set transitions

The aspects enable a multi-core processor or system on chip to determine a low power configuration that provides the most system power savings by placing selected resources in a low power mode depending upon acceptable system latencies, dynamic operating conditions (e.g., temperature), expected idle time, and the unique electrical characteristics of the particular device. Each of the cores/processing units treated in a symmetric fashion, and each core may choose its operating state independent of the other cores, without performing complex handshaking or signaling operations.

Dynamic sleep for multicore computing devices

A method and system for managing requests among resources within a portable computing device include a scheduler receiving data from a client for scheduling a plurality of requests. Each request identifies at least one resource and a requested deadline. Next, data from the client is stored by the scheduler in a database. The scheduler then determines times and a sequence for processing the requests based on requested deadlines in the requests and based on current states of resources within the portable computing device. The scheduler then communicates the requests to the resources at the determined times and according to the determined sequence. The scheduler, at its discretion, may schedule a request after its requested deadline in response to receiving a new request command from a client. The scheduler may allow a sleep set corresponding to a sleep processor state to power off a processor.

Method and system for scheduling requests in a portable computing device

A method for predicting future states of a vehicle including the steps of selecting a model having n states reflecting dynamic features of the vehicle; inputting noisy sensor measurements representing a current state of the vehicle to generate (2n+1) sigma points Xwhere i=0, . . . . 2n, each of the sigma points having n states; performing (2n+1) integrations, each integration includes propagating the n-states of the respective sigma points Xthrough the non-linear function Y=f(X); and combining the propagated sigma points to generate the predicted future states of the vehicle.

System and method for stochastically predicting the future states of a vehicle

A method and system for managing sleep states of one or more interrupt controllers of processors contained within a portable computing device are described. The method includes a processor defining wake-up interrupt settings in a storage device contained within the portable computing device. This storage device may comprise message random access memory ('RAM'). After wake-up settings have been established in message RAM, a processor may generate an alert that the wake-up settings in the message RAM have been defined. Next, a controller reviews the wake-up interrupt settings in the message RAM for a plurality of interrupt controllers that correspond with a plurality of processors contained within the portable computing device. The controller merges the wake-up settings in the message RAM and then sends the merged wake-up settings to an always-on power manager ('APM'). The APM is responsible for issuing signals to place interrupt controllers of processors into a sleep state.

Method and system for managing sleep states of interrupt controllers in a portable computing device

A method and system for managing requests to resources among processors of a portable computing device ('PCD') includes each master processor identifying a plurality of resources of the PCD in a storage device, such as a message RAM. This message RAM is part of the PCD. A master processor may identify desired states for the plurality of resources in the message RAM. Then, the master processor may generate an alert that the plurality of resources and desired states for resources have been set in the message RAM. After receiving the alert, a controller may determine if one or more previous requests have been processed to completion. If so, then the controller may review the contents of the message RAM to identify the plurality of resources and to identify the desired states of the resources. If appropriate, the controller may pass the desired states to the plurality of resources.

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Boulder, CO, United States of America

Andrew James Frantz