International Business Machines Corporation

Andrew J Morrish

David J Eagle

Julian D Williams

Terence K Gibbs

Graham Luck

Adrian Mark Clitheroe

Valerie McLaren Findlay

John H Wells

Deflection apparatus for a raster scanned cathode ray tube display comprises a ramp generator (210) for producing a current ramp signal synchronised to a raster synchronisation signal. A ramp regulator (230) is connected to the generator (210) for varying the amplitude of the scan signal as a function of the difference between a reference input and a feedback signal. A feedback circuit (220) connected to the generator (210) and to the regulator (230) for generating the feedback signal as a function of the amplitude and frequency of the line scan signal. A multiplier (250) is connected to the regulator and for varying the reference input as a function of an integer multiple of the frequency of the raster synchronisation signal. Any scan signal frequency component in the feedback signal is cancelled at the input to the regulator by introducing, via the multiplier (250), a scan signal frequency component to the reference input. Because the displayed picture size is thus made independent of scan signal frequency, the deflection apparatus can maintain a constant picture size despite variations in scanning signal frequency without the bandwidth limitations of the prior art.

Deflection apparatus for raster scanned CRT displays

An elapsed time recording device includes a counter (130) for incrementally advancing a count value from an initial value towards and beyond a threshold in response to successive clock pulses of a clock signal. Control logic (140) enables the counter (130) to incrementally advance the count value in response to a first input (pin 3) and a second input (pin 1) being at or near a first voltage level, and holds the count value in response to the first input (pin 3) being at or near a second voltage level and the second input (pin 1) being at or near the first voltage level. Setting logic (210) sets the count value to a value beyond the threshold in response to the first input (pin 3) and the second input (pin 1) being at or near the second voltage level when the count value is between the initial value and the threshold. Because the device consists essentially of electronic circuit elements, it can be implemented in the form of an application specific integrated circuit package suitable for high volume manufacture at relatively low cost. The device is therefore favorable for use in mass produced electrical appliances. Because the count value is immediately advanced beyond the threshold in response to removal of the second input voltage, advance of the count value towards the threshold cannot be prevented or delayed by tampering with pin connections of the device.

Elapsed time recording device

Cathode ray tube display apparatus comprises a cathode ray tube display screen for displaying successive frames of a non-interlaced video image in response to excitation by at least one raster-scanned electron beam. A line timebase circuit sequentially addresses each electron beam to successive pixels on the screen in a line of a raster in response to a line timebase sync signal. A frame timebase circuit sequentially addresses each electron beam to successive lines of the raster in response to a frame timebase sync signal. The frame timebase circuit comprises means for offsetting successive frames of the video image in a direction transverse of the lines of the raster by a distance less than the spacing of adjacent lines of the raster. Gaps between adjacent pixels on successive lines of the raster are made invisible to the viewer because the persistence of viewer's eye effectively integrates the image content of successive frames. Also, because the successive frames have the same image content, there is no low-frequency component in the image spectrum below the frame timebase frequency. Therefore, the displayed image is free from objectionable flicker.

Cathode ray tube display apparatus

A CRT display system is described wherein a measure of the beam current generated within the CRT is derived and the voltage across the cathode heater modified as a function of this measure. In this way the optimum voltage across the heater coils is maintained, thus preventing 'cathode stripping' at times of peak beam currents, and optimizing the CRT's working lifetime.

Method and apparatus for increasing the cathode efficiency in a cathode

A vertical scan circuit for a display is described which allows automatic picture height and centering. The deflection voltages at the start and end of active video time, are stored by capacitors fed via switches activated by signal pulses. These stored voltages are compared to margin reference voltages Vtmref and Vbmref which correspond to the desired top and bottom of the picture as displayed for a particular monitor. The maximum deflection voltage on flyback (Vmax) and the slope of the signal (dv/dt) are adjusted so that the top margin voltage (Vtm) and the bottom margin voltage (Vbm), bear desired relationships to these reference voltages (Vtmref and Vbmref respectively), thus ensuring that the top and bottom of the picture as displayed remains constant for different screen formats.

Self-adapting vertical scan circuit for raster-scanned cathode ray tube

A color cathode ray tube display includes a degauss coil and a switched mode power supply. The degauss coil is connected in series with the input rectifier (5) of the SMPS to limit the current surge on power on but is shorted out by a switch, preferably constituted by a triac, after the SMPS switching transistor turns on to give substantially zero residual degauss current. Forward voltage drop across the triac can be compensated for by back-to-back diodes (13) connected in series with the degauss coil. The triac is switched under control of a signal from an auxiliary winding on the SMPS output transformer (a).

Cathode ray tube display with combined degauss and surge limiting circuit

An interlaced raster-scanned color cathode ray tube display in which flicker is reduced by temporally off-setting one of the colors (preferably red) so that normally even-field data for that color is displayed in the odd field and normally odd-field data for that color is displayed in the even field. The temporal shift can be either before or during storage of the bit patterns or during or after reading of the bit patterns. The resulting positional shift of one scan line of the temporally shifted color is compensated for by using the static and/or dynamic convergence circuitry.

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Eastleigh, United Kingdom

Andrew J Morrish