General Electric Company

Andrew Hutchinson

Michael Ritchie

Methods for determining timestamps for signal timing edges for use in, e.g., a reciprocal counter for determining the frequency of a signal is disclosed, comprising the steps of inputting the signal into a tapped delay line, producing a plurality of delay line tap signals at the output of each of the delay line taps. In one embodiment, after detecting the signal timing edge and determining an initial time value corresponding to the timer clock cycle count at the signal timing edge or the next clock timing edge, the delay line tap signals are monitored to determine a fractional correction time value adjustment to be made to the initial value to account for the delay between the signal timing edge and the next clock timing edge to determine the timestamp. In another embodiment, after detecting the signal timing edge, the average of a plurality of delay line timer clock cycle counts corresponding to the timer clock cycle counts at the delay line tap signal timing edges is used to determine the timestamp.

Methods for determining the frequency or period of a signal

A pressure sensor and method wherein a resonant pressure transducer has a frequency F which changed depending on the applied pressure P and the temperature T. A temperature sensor measures the temperature T. A memory includes stored therein data points corresponding to the sensor's frequency F at difference applied pressures and temperatures. A processor is configured to generate several polynomials from the data points and calculate P&#x3bc; at T&#x3bc; when the transducer frequency is F&#x3bc;.

Sensor processing method

A sigma-delta (&#x3a3;&#x394;) analog to digital converter with internal synchronous demodulation responsive to a sample clock, reference clock and conversion clock including a sample switching circuit responsive to an AC input to sample the AC input at the sample clock rate; the sample switching circuit including first and second input switches responsive to the reference clock for selectively, alternately sampling the positive and the negative AC input at the reference clock rate; and an inverter circuit responsive to the reference clock and the sample clock for reversing the polarity of signals from the sample clock in synchronism with the reference clock to reverse the sense of the input switches and synchronously demodulating the AC input within the converter.

Sigma delta analog to digital converter with internal synchronous demodulation

A submersible device sealing system includes a submersible device, a cable having wires connected to the submersible device, and a sheath about the wires. There is a sleeve about the cable sheath, and a crimp about the sleeve. An encapsulant is disposed about the crimp, the wires, and the submersible device to prevent fluid ingress to the wires connected to the submersible device. The encapsulant is made of material separable from the cable sheath but the crimp is made of a material bondable to the encapsulant to seal the submersible device with respect to the fluid.

Growing community of inventors

Williamsburg, VA, United States of America

Andrew Hutchinson