Northrop Grumman Systems Corporation

Andrew Hostetler Miklich

Quentin P Herr

Anna Y Herr

Donald Lynn Miller

Micah John Atman Stoutimore

John Xavier Przybysz

Ofer Naaman

Donald L Miller

Joel D Strand

Stephen P Caldwell

William Robert Reohr

Robert L Miller

Kurt Pleim

Elias J Galan

Cody James Ballard

One example includes an amplifier system. The system includes an input configured to receive an input pulse, a first input path coupled to the input and configured to provide the input pulse to a control node, and a second input path coupled to the input and comprising at least one delay element to provide a delayed version of the input pulse to the control node. The system also includes a first amplifier device comprising the control node and being configured to provide a control flux in response to the input pulse and in response to the delayed version of the input pulse. The system further includes a second amplifier device coupled to the first amplifier device, the second amplifier device being set to a flux state in response to the control flux to provide an output voltage.

Non-return to zero (NRZ) amplifier system

One example includes a flux switch system. The system includes an input stage configured to provide an interrogation pulse. The system also includes a plurality of flux loops configured to receive an input current. Each of the flux loops includes a Josephson junction configured to trigger to generate an output pulse in response to a first polarity of the input current and to not trigger to generate no output pulse in response to a second polarity of the input current opposite the first polarity. The system further includes an output stage configured to propagate the output pulse to an output of the flux switch system.

Flux switch system

One embodiment describes a memory cell. The memory cell includes a phase hysteretic magnetic Josephson junction (PHMJJ) that is configured to store one of a first binary logic state corresponding to a binary logic-1 state and a second binary logic state corresponding to a binary logic-0 state in response to a write current that is provided to the memory cell and to generate a superconducting phase based on the stored digital state. The memory cell also includes a superconducting read-select device that is configured to implement a read operation in response to a read current that is provided to the memory cell. The memory cell further includes at least one Josephson junction configured to provide an output based on the superconducting phase of the PHMJJ during the read operation, the output corresponding to the stored digital state.

Phase hysteretic magnetic josephson junction memory cell

One embodiment describes a JMRAM memory cell system. The system includes a phase hysteretic magnetic Josephson junction (PHMJJ) that stores one of a first binary state and a second binary state in response to a write current provided during a data write operation and to provide a superconducting phase based on the stored digital state. The system also includes a directional write element configured to provide a directional bias current during the data write operation to provide the superconducting phase of the PHMJJ in a predetermined direction corresponding to the first binary state. The system further includes at least one Josephson junction having a critical current that is based on the superconducting phase of the PHMJJ and being configured to provide an output corresponding to the stored digital state in response to a read current that is provided during a read operation.

Superconducting phase-controlled hysteretic magnetic Josephson junction JMRAM memory cell

One embodiment describes a Josephson current source system. The system includes a flux-shuttle loop comprising a plurality of stages arranged in a series loop. Each of the plurality of stages includes at least one Josephson junction. The flux-shuttle loop can be configured, when activated, to sequentially trigger the at least one Josephson junction in each of the plurality of stages about the flux-shuttle loop in response to an inductively-coupled AC clock signal to generate a DC output current provided through an output inductor. The system also includes a flux injector system that is configured to activate the flux-shuttle loop. The flux injector system is further configured to automatically deactivate the flux-shuttle loop in response to an amplitude of the DC output current increasing to a predetermined deactivation threshold.

Josephson current source systems and method

Phase hysteretic magnetic Josephson junction memory cell

A method and apparatus for generating a low phase noise RF signal where the output from a low phase-noise stabilized local oscillator operating at relatively high frequencies in the GHz range is combined in a power combiner with a digital data stream generated by a digital waveform generator and which is representative of one or more analog signals in a predetermined frequency spectrum of relatively lower RF frequencies in the MHz range. The combined signal is applied to a Josephson junction array whose output consists of a data stream including pulses of precise constant amplitude and which is then fed to a bandpass filter circuit having a predetermined bandpass. The filter extracts the lower frequency analog signal but now consisting of a signal having low phase-noise. This low phase-noise signal is mixed with the low phase-noise output from the local oscillator, thus providing a low phase- noise RF signal which when coupled to a radar transmitter results in the generation of transmitter radar pulses that enable targets to be detected in 'clutter'. The power capability of the Josephson junction array can also be increased by adding a source of current to the input to the Josephson junction array. This current is derived from the digital data stream by means of another bandpass filter connected from the digital waveform generator to the power combiner.

Growing community of inventors

Columbia, MD, United States of America

Andrew Hostetler Miklich