Massachusetts Institute of Technology

United States of America As Represented by the Secretary of the Air Force

Andrew H Loomis

Bernard B Kosicki

Robert K Reich

Eugene D Savoye

James A Gregory

Barry E Burke

James E Carrick

Allen M Waxman

David C Shaver

Brian F Aull

Alvin Gabriel Stern

David A Fay

Alan N Gove

Robert W Mountain

Bradley J Felton

Douglas J Young

William H McGonagle

A photon-counting Geiger-mode avalanche photodiode intensity imaging array includes an array of pixels, each having an avalanche photodiode. A pixel senses an avalanche event and stores, in response to the sensed avalanche event, a single bit digital value therein. An array of accumulators are provided such that each accumulator is associated with a pixel. A row decoder circuit addresses a pixel row within the array of pixels. A bit sensing circuit converts a precharged capacitance into a digital value during read operations.

Digital photon-counting geiger-mode avalanche photodiode solid-state monolithic intensity imaging focal-plane with scalable readout circuitry

Provided is a method and apparatus for close alignment of two or more electrically conductive wafers which are positioned face-to-face in closely spaced opposition, the wafers having position marks on corresponding portions thereof, the wafers being aligned as to their mating components, as guided by optically comparing the alignment of the respective position marks; deflecting an interior portion of one of the wafers into contact with the other wafer, to partially bond the wafers to each other, then fully contacting and bonding the rest of the wafer pair and then optically checking the resulting wafer alignment to see if same is acceptable.

Wafer alignment and bonding

The wafer thickness of a CCD front illuminated silicon wafer is reduced to about ten to twenty microns, the Al substrate is removed and a 5-35 nanometer silicon oxide layer is produced on the thinned back of the silicon wafer followed by implanting boron ions within the back surface to a depth up to about ten nanometers. Furnace annealing the wafer is now carried out, and the Al substrate is redeposited to enable the formation of gate contacts.

Fabrication of UV-sensitive back illuminated CCD image sensors

An imaging system is provided for imaging a scene to produce a sequence of image frames of the scene at a frame rate, R, of at least about 25 image frames per second. The system includes an optical input port, a charge-coupled imaging device, an analog signal processor, and an analog-to-digital processor (A/D). The A/D digitizes the amplified pixel signal to produce a digital image signal formatted as a sequence of image frames each of a plurality of digital pixel values and having a dynamic range of digital pixel values represented by a number of digital bits, B, where B is greater than 8. A digital image processor is provided for processing digital pixel values in the sequence of image frames to produce an output image frame sequence at the frame rate, R, representative of the imaged scene, with a latency of no more than about 1/R and a dynamic range of image frame pixel values represented by a number of digital bits, D, where D is less than B. The output image frame sequence is characterized by noise-limited resolution of at least a minimum number, N.sub.M, of line pairs per millimeter, referred to the charge-coupled imaging device pixel array, in an imaged scene as a function of illuminance of the input light impinging the charge-coupled imaging device pixels.

Low-light-level imaging and image processing

Growing community of inventors

Westford, MA, United States of America

Andrew H Loomis