Alliance for Sustainable Energy, LLC

Midwest Research Institute

Trustees of the Colorado School of Mines

Andrew Gordon Norman

Aaron Joseph Ptak

William Edwin McMahon

Jerry M Olson

Yong Lin

Eric Steven Toberer

Kirstin Alberi

Celeste Louise Melamed

Disclosed herein are compositions, methods and devices that allow for water-soluble epitaxial lift-off of III-V. Epitaxial growth of STO/SAO templates on STO (001) and Ge (001) substrates were demonstrated. Partially epitaxial GaAs growth was achieved on STO/SAO/STO substrate templates.

Water soluble oxide liftoff layers for GaAs photovoltaics

Disclosed herein are methods for exfoliation of single crystals allowing for growth of high crystalline quality on the exfoliated surfaces for III-V photovoltaics. Also disclosed herein are methods for growing GaAs (111) on layered-2D BiSe(0001) substrates in an MOCVD reactor.

Methods of exfoliating single crystal materials

A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a silicon substrate using a compliant buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The compliant buffer material and semiconductor materials may be deposited using coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The coincident site lattice matching epitaxial process, as well as the use of a ductile buffer material, reduce the internal stresses and associated crystal defects within the deposited semiconductor materials fabricated using the disclosed method. As a result, the semiconductor devices provided herein possess enhanced performance characteristics due to a relatively low density of crystal defects.

Coincident site lattice-matched growth of semiconductors on substrates using compliant buffer layers

A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a spinel substrate using a sacrificial buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The sacrificial buffer material and semiconductor materials may be deposited using lattice-matching epitaxy or coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The sacrificial buffer layer may be dissolved using an epitaxial liftoff technique in order to separate the semiconductor device from the spinel substrate, and the spinel substrate may be reused in the subsequent fabrication of other semiconductor devices. The low-defect density semiconductor materials produced using this method result in the enhanced performance of the semiconductor devices that incorporate the semiconductor materials.

Methods of producing free-standing semiconductors using sacrificial buffer layers and recyclable substrates

Disclosed embodiments include methods of fabricating a semiconductor layer or device and devices fabricated thereby. The methods include, but are not limited to, providing a substrate having a cubic crystalline surface with a known lattice parameter and growing a cubic crystalline group III-nitride alloy layer on the cubic crystalline substrate by coincident site lattice matched epitaxy. The cubic crystalline group III-nitride alloy may be prepared to have a lattice parameter (a') that is related to the lattice parameter of the substrate (a). The group III-nitride alloy may be a cubic crystalline InGaAlN alloy. The lattice parameter of the InGaAlN or other group III-nitride alloy may be related to the substrate lattice parameter by (a&#x2032;)=&#x221a;2(a) or (a&#x2032;)=(a)/&#x221a;2. The semiconductor alloy may be prepared to have a selected band gap.

Lattice matched crystalline substrates for cubic nitride semiconductor growth

Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a metal or metal alloy substrate having a crystalline surface with a known lattice parameter (a). The methods further include growing a crystalline semiconductor alloy layer on the crystalline substrate surface by coincident site lattice matched epitaxy. The semiconductor layer may be grown without any buffer layer between the alloy and the crystalline surface of the substrate. The semiconductor alloy may be prepared to have a lattice parameter (a') that is related to the lattice parameter (a). The semiconductor alloy may further be prepared to have a selected band gap.

Lattice matched semiconductor growth on crystalline metallic substrates

Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a substrate having a crystalline surface with a known lattice parameter (a). The method further includes growing a crystalline semiconductor layer on the crystalline substrate surface by coincident site lattice matched epitaxy, without any buffer layer between the crystalline semiconductor layer and the crystalline surface of the substrate. The crystalline semiconductor layer will be prepared to have a lattice parameter (a') that is related to the substrate lattice parameter (a). The lattice parameter (a&#x2032;) maybe related to the lattice parameter (a) by a scaling factor derived from a geometric relationship between the respective crystal lattices.

Growth of coincident site lattice matched semiconductor layers and devices on crystalline substrates

Nanostructures () and methods for production thereof by phase separation during metal organic vapor-phase epitaxy (MOVPE). An embodiment of one of the methods may comprise providing a growth surface in a reaction chamber and introducing a first mixture of precursor materials into the reaction chamber to form a buffer layer () thereon. A second mixture of precursor materials may be provided into the reaction chamber to form an active region () on the buffer layer (), wherein the nanostructure () is embedded in a matrix () in the active region (). Additional steps are also disclosed for preparing the nanostructure () product for various applications.

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Evergreen, CO, United States of America

Andrew Gordon Norman