Gary W. Clem, Inc.

Xilinx, Inc.

Magnalynx, Inc.

Mosys, Inc.

Andrew G Jenkins

Charles Walter Boecker

Eric Douglas Groen

Brian W Carr

Scott A Sporrer

Scott Alan Irwin

Aaron Hoelscher

Curtis R Hammer

Matthew Shafer

David Black

Nick Merfeld

Adam R Koesters

Peter B Moore

Edward J Plizga

William C Black

Joseph Neil Kryzak

Yiqin Chen

Marcus D Woster

Scott A Irwin

Joseph N Kryzak

Aaron J Hoelscher

A method of operating a planter where plot characteristics are input into a controller that is associated with a planter. A distance measuring device associated with the controller senses ground speed and distance traveled and transmits the sensed information to the controller. The controller then automatically adjusts the rotational speed of a seed plate of a row planter mounted to the planter based upon the sensed information to achieve the input plot characteristics.

Method of operating a planter for planting seeds in a field for experimental purposes

A system for planting seeds having a metering system positioned before a belt lowering system that has a sensor to detect the position of a seed on the belt lowering system. The rotational speed of the metering system and the belt lowering system are determined by the speed and location of a planter and the position of the seed on the belt lowering system to correct seed positioning with relation to a pre-mapped or selected field starting location.

Drop tube system for planting field seeds in rows with different varieties of seeds

A seed counting device where accuracy is maintained at higher counting rates. The seed counting device has a hopper in communication with a tray. An activator is connected to the tray to vibrate the tray. Connected to one end of the tray is a separator having sensors. Below the tray and in partial alignment with the separator is a projecting device. The projecting device projects seeds that fall from the tray past the sensors and into a seed chamber.

Seed counting device

The present disclosure is generally directed to a method and apparatus to communicate data between two or more semiconductor devices. In an embodiment, a method includes synchronizing a master device with a slave device, where the master device includes a semiconductor device. Synchronizing includes transmitting a first synchronization marker data pattern via a first serial interface from the master device at a first time, and receiving a second synchronization marker data pattern via a second serial interface at the master device at a second time in response to transmitting the first synchronization marker data pattern. Synchronizing also includes determining, based at least in part on the first time and the second time, a third time when a reply is to be received by the master device in response to a request transmitted from the master device to the slave device.

Method and apparatus to encode and synchronize a serial interface

The present disclosure is generally directed to a method of communicating data between two or more semiconductor devices. Serial interfaces using the method have a reduction in latency compared to conventional serial interfaces. The method enables features needed for a serial interface, such as limited run lengths and recognizable data boundaries to establish alignment. In addition, a method for synchronizing two or more semiconductor devices through serial interfaces has been presented. This is done by passing a marker data pattern through the system.

Method of encoding and synchronizing a serial interface

A programmable logic device includes a plurality of programmable multi-gigabit transceivers, programmable logic fabric, and a control module. Each of the plurality of programmable multi-gigabit transceivers is individually programmed to a desired transceiving mode of operation in accordance with a plurality of transceiver settings. The programmable logic fabric is operably coupled to the plurality of programmable multi-gigabit transceivers and is configured to process at least a portion of the data being transceived via the multi-gigabit transceivers. The control module is operably coupled to produce the plurality of transceiver settings based on a desired mode of operation for the programmable logic device.

Programmable logic device including programmable multi-gigabit transceivers

A memory device and system are disclosed that may include a serial data interface, a serial address interface, and a reference clock interface. The reference clock interface is configured to receive a signal from a reference clock source that provides a reference clock signal to a memory control device. The serial interfaces are coupled to other memory devices or memory control devices. A method of transferring data within a memory system using serial interfaces is also disclosed. The method includes performing clock multiplication on a reference clock to provide a multiplied clock, using the multiplied clock to serialize and transmit data onto a serial interface, recovering data from the seal interface, using the reference clock to determine an initial frequency for use by clock and data recovery module, using the data recovered from the serial interface to determine a phase and final frequency of a recovered clock, and using the recovered clock to de-serialize received serial data into parallel data words.

Memory system and memory device having a serial interface

A method for correcting antenna violations in high-density integrated circuits (IC) begins by determining location of an antenna violation within a layout of a high-density integrated circuit. The processing continues by determining an affected input of a cell of the high-density integrated circuit based on the location of the antenna error. The processing then continues by identifying an available charge protection element. The processing further continues by logically coupling the available charge protection element to the affected input of the cell.

Antenna violation correction in high-density integrated circuits

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Nevada, IA, United States of America

Andrew G Jenkins