Unisys Corporation

Andrew F Sanderson

Duane J McCrory

Anthony P Gold

Todd M Rimmer

Joseph H End, Iii

A crossbar structure for use in a multi-processor computer system to connect a plurality of processors to at least one shared resource. The crossbar structure comprises for each processor, a storage location for receiving from a respective processor a memory address of a lock control structure associated with the shared resource. When the processor needs to acquire a lock thereto, the crossbar structure, on behalf of the processor, performs memory operations on the lock control structure at the address specified in the storage location in order to acquire the lock on behalf of the processor.

System and method for hardware assisted spinlock

A remote monitoring system providing diagnostic and remedial functions to a computer system. The remote monitoring system comprises a service center and a diagnostic agent. The diagnostic agent is located proximate to the monitored computer system and electronically coupled to the monitored computer system such that the diagnostic agent can retrieve information about the various states of the monitored computer system. The diagnostic agent stores the retrieved information and further processes it for future use. Such information includes fault monitor information, accounting information, system performance information, and system management information. In addition, the diagnostic agent has control over the monitored computer system allowing it to perform diagnostic and remedial functions. Further, the diagnostic agent is electronically coupled to a service center located remotely to the monitored computer system. In the context of fault monitoring operations, the diagnostic agent interrogates the monitored computer system for information related to malfunctions. Moreover, the diagnostic agent interacts with the service center through a communication interface to retrieve various diagnostic and remedial information related to discovered computer system operability problems. The diagnostic agent uses the retrieved information to overcome the discovered problems. Alternatively, the remote monitoring system used as an information tool for a business model to provide remedial services for computer systems.

Remote computer system monitoring and diagnostic board

An enhanced cache line directory entry includes at least one affinity bit that indicates an affinity for a particular type of cache line ownership. The affinity bit is used to modify a request for a cache line in accordance with the indicated affinity. The affinity bit may represent an affinity for read-only requests, and the affinity bit may represent an affinity for read-write requests. For example, if an I/O affinity bit is in the set state and an I/O device requests a cache line with read-write permission, the request may be converted to a read-only request in accordance with the indicated affinity. As another example, if a processor affinity bit is in the set state and a processor requests a cache line with read-only permission, the request may be converted to a read-write request. Software control of the affinity bits enables system performance to be tuned and cache coherency operations can thereby be reduced.

Software controlled cache line ownership affinity enhancements in a multiprocessor environment

Apparatus and method that incorporate bussed test access port interface into a system control interface for testing and controlling system logic boards in a manner that is fully compliant with the IEEE 1149.1 standard, while conserving system controller card signals. The apparatus incorporates six signals per interface, which includes the five standard signals as defined by IEEE 1149.1 standard plus a maintenance enable (ME) signal. Four of the standard signals, TCK, TMS, TDI and TRST* are bussed among multiple system logic boards, while the ME signals and the TDO signals are connected in a point-to-point manner between the system controller card and system logic boards. Instruction and data on the TCK, TMS, TDI, and TRST* signals are simultaneously bussed to all system logic boards. These four signals are received by each system logic board through an interface enable circuit, controlled by the ME signal line. If the instructions or data are intended for a specific system logic board, its corresponding ME signal line will be enabled to permit the passage of these signals and the resulting TDO signal through the interface enable circuit. This arrangement permits the incorporation of a bussed TAP interface into a system control interface for testing and controlling system logic boards that comply fully with the IEEE 1149.1 standard, while conserving the system controller card backplane pins dedicated to TAP signals, to two pins per system logic board plus four pins for the bussed TAP interface.

Growing community of inventors

Havertown, PA, United States of America

Andrew F Sanderson