Nvidia Corporation

Andrew Currid

Mark Alan Overby

Michael Ward Johnson

John Shigeto Minami

Mrudula Kanuri

Chenghuan Jia

Nirmal Raj Saxena

Franck Diard

Michael John Sebastian Smith

Robert William Chapman

Cyndi Jung

Shounak Santosh Deshpande

Surath Raj Mitra

Parag B Kulkarni

Arpit R Jain

Kirti Wankhede

Santosh Kumar Ravindranath Shukla

Systems and methods are disclosed for throttling memory bandwidth accessed by virtual machines (VMs). A technique for dynamically throttling the virtual computer processing units (vCPUs) assigned to a VM (tenant) controls the memory access rate of the VM. When the memory is shared by multiple VMs in a cloud-computing environment, one VM increasing its memory access rate may cause another VM to suffer memory access starvation. This behavior violates the principle of VM isolation in cloud computing. In contrast to conventional systems, a software solution for dynamically throttling the vCPUs may be implemented within a hypervisor and is therefore portable across CPU families and doesn't require specialized server-class CPU capabilities or limit the system configuration.

Memory bandwidth throttling for virtual machines

A computer system includes an operating system having a kernel and configured to launch a plurality of computing processes. The system also includes a plurality of graphics processing units (GPUs), a front-end driver module, and a plurality of back-end driver modules. The GPUs are configured to execute instructions on behalf of the computing processes subject to a GPU service request. The front-end driver module is loaded into the kernel and configured to receive the GPU service request from one of the computing processes. Each back-end driver module is associated with one or more of the GPUs and configured to receive the GPU service request from the front-end driver module and pass the GPU service request to an associated GPU.

Split driver to control multiple graphics processors in a computer system

A device for processing graphics data includes a plurality of graphics processing units. Each graphics processing unit may correspond to a virtualized operating system. Each graphics processing unit may include a configuration register indicating a 3D class code and a command register indicating that I/O cycle decoding is disabled. The device may be configured to transmit a configuration register value to a virtualized operating system indicating a VGA-compatible class code. The device may be configured to transmit a command register value to the virtualized operating system that indicates that I/O cycle decoding is enabled. In this manner, legacy bus architecture of the device may not limit the number of graphics processing units deployed in the device.

Scale-up techniques for multi-GPU passthrough

One embodiment of the present invention sets forth a technique for automatically provisioning a diskless computing device and an associated server system. A diskless computing device client incorporates an iSCSI initiator that is used to access resources provided by an iSCSI target that is resident on a server computing device. The iSCSI initiator is implemented in the client firmware, providing INT13 disk services entry points, thereby enabling the client to transparently access virtual storage devices at boot time. The client device conducts an apparently local installation using the virtual storage devices provided by the server computing device. A short signature value is associated with the boot image, uniquely associating the boot image with the specific client hardware configuration. When the client device boots normally, the signature value of the client device is presented to the server computing device to automatically reference the appropriate boot image.

System and method for operating system installation on a diskless computing platform

One embodiment of the present invention sets forth a technique for synchronization between two or more processors. The technique implements a spinlock acquire function and a spinlock release function. A processor executing the spinlock acquire function advantageously operates in a low power state while waiting for an opportunity to acquire spinlock. The spinlock acquire function configures a memory monitor to wake up the processor when spinlock is released by a different processor. The spinlock release function releases spinlock by clearing a lock variable and may clear a wait variable.

Managing a spinlock indicative of exclusive access to a system resource

A system and method are provided for performing the retransmission of data in a network. Included is an offload engine in communication with system memory and a network. The offload engine serves for managing the retransmission of data transmitted in the network.

Retransmission system and method for a transport offload engine

One embodiment of the present invention sets forth a technique for performing RAID-6 computations using simple arithmetic functions and two-dimensional table lookup operations. A set of threads within a multi-threaded processor are assigned to perform RAID-6 computations in parallel on a stripe of RAID-6 data. A set of lookup tables are stored within the multi-threaded processor for access by the threads in performing the RAID-6 computations. During normal operation of a related RAID-6 disk array, RAID-6 computations may be performed by the threads using a small set of simple arithmetic operations and a set of lookup operations to the lookup tables. Greater computational efficiency is gained by reducing the RAID-6 computations to simple operations that are performed efficiently on a multi-threaded processor, such as a graphics processing unit.

RAID-6 computation system and method

A system, method, and related data structure are provided for transmitting data in a network. Included is a data object (i.e. metadata) for communicating between a first network protocol layer and a second network protocol layer. In use, the data object facilitates network communication management utilizing a transport offload engine.

System and method for using metadata in the context of a transport offload engine

One embodiment of the present invention sets forth a technique for performing RAID-6 computations using simple arithmetic functions and two-dimensional table lookup operations. Four lookup tables are computed and saved prior to normal operation of a RAID-6 disk array. During normal operation of the RAID-6 disk array, all RAID-6 related computations may be performed using a small set of simple arithmetic operations and a set of lookup operations to three of the four previously saved lookup tables. Greater computational efficiency is gained by reducing the RAID-6 computations to simple operations that are performed efficiently on a typical central processing unit or graphics processing unit.

Raid-6 computation system and method

Embodiments of the invention provide a method for selecting a network boot device using a hardware class identifier. Generally, embodiments of the invention enable a diskless client to communicate a hardware class identifier in a network connection request. The hardware class identifier is used to determine the proper boot server to provide a boot image to the diskless client.

System and method for selecting a network boot device using a hardware class identifier

Embodiments of the present invention provide a method for handling errors in data servers. Generally, embodiments of the invention enable a data packet that is marked as erroneous to be handled so that it is not committed to permanent storage. One or more components are configured to recognize a poisoned data indicator, and to respond to the indicator by taking programmed actions to delete the data, to stop the data from being transmitted, to notify upstream components, and to purge related data from downstream components.

System and method of handling erroneous data in computer systems

One embodiment of the present invention sets forth a technique for mapping a small computer system interface (SCSI) architecture model-3 (SAM-3) task priority to an IEEE Standard 802.1q tag control information (TCI) field. Four bits that define a SAM-3 task priority are mapped to the three user priority bits within a standard 802.1q TCI field. By enabling the SAM-3 task priority of a given SCSI command to determine the user priority within a related IEEE 802.1q Ethernet frame, the Ethernet network is enabled to substantially honor the requested task priority for the SCSI command.

System and method for SAM-3 prioritization in iSCSI using 802.1q ethernet prioritization

One embodiment of the present invention sets forth a technique for establishing high user priority for Ethernet frames related to demand-paging operations over iSCSI. The iSCSI initiator is configured to identify demand-page operations using techniques specific to the operating system and to set the 802.1q tag control information (TCI) user priority bit field to reflect high priority for demand-page related Ethernet frames. The demand-page related Ethernet frames are then delivered to the iSCSI target with a higher priority through the intervening Ethernet network than other traffic. Overall performance of demand paging operations is improved relative to prior art systems through an average reduction in network latency.

System and method for network storage prioritization of demand-page operations

A system and method are provided for communicating data in a network utilizing a transport offload engine. Included is a data list object that describes how data communicated in a network is to be stored (i.e. placed, etc.) in memory (i.e. application memory). Stored in association (i.e. located, kept together, etc.) with the data list object is a sequence object. Such sequence object identifies a sequence space associated with the data to be stored using the data list object. To this end, the sequence object is used by a transport offload engine to determine whether or not incoming data is to be stored using the data list object.

Growing community of inventors

Alameda, CA, United States of America

Andrew Currid