Dell Products Inc.

Andrew Butcher

Shawn Joel Dube

Shyamkumar Thiyagarajan Iyer

Glen Sescila

Lee Eric Ballard

Timothy Michael Lambert

Vadhiraj Sankaranarayanan

Mukund Purshottam Khatri

Stuart Allen Berke

Gaurav Chawla

Anh Dinh Luong

Bhyrav M Mutnury

Kevin Warren Mundt

Jimmy Doyle Pike

John S Harwood

Vijay Bharat Nijhawan

Hendrich M Hernandez

Syama Poluri

Douglas L Farley

Tuyet-Huong Thi Nguyen

Srikrishna Ramaswamy

Tommi Salli

Geoffrey A Reid

Amit Shah

Krishna Pradyumna Kakarla

René Franco

Mark Lawrence Farley

Krishna Ramaswamy

Jon F Lewis

An LCS networking device multi-host primary circuit board system includes a primary circuit board having a host processing system that provides an operating system for an LCS. A networking device connector on the circuit board is configured to connect to a networking device that performs networking operation(s) for the LCS, with the networking device connector also coupled via the circuit board to the host processing system to provide a first host coupling that is used by the networking device to access the host processing system. A first orchestrator device connector on the circuit board is configured to cable to an orchestrator device including an orchestrator processing system that performs orchestration operations for the LCS, with the first orchestrator device connector also coupled via the circuit board to the networking device connector to provide a second host coupling that is used by the networking device to access the orchestrator processing system.

LCS networking device multi-host primary circuit board system

The present disclosure enables proxied device ownership for a secondary processing system by providing a chassis housing a plurality of devices, a secondary processing system, and a central processing system that includes an integrated switch device that is coupled to each of the plurality of devices and the secondary processing system. The central processing system enter a Basic Input/Output System (BIOS) mode in which the central processing system provides a BIOS that is configured to execute instructions and, using the BIOS, receives a transaction that was generated by the secondary processing system and that is directed to a first device that is include in the plurality of devices, and executes the transaction on the first device.

Secondary processor proxied device ownership system

A client-isolation internal/external fabric LCS provisioning system includes an orchestrator device coupled to a client device via an external fabric, and coupled to resource devices via an internal fabric that is not accessible to the client device via the external fabric. The orchestrator device configures the resource devices to communicate with each other in a manner that satisfies a workload intent for a workload requested by the client device, and presents an LCS provided using the configured resource devices to the client device via the external fabric. When the orchestrator device receives LCS communication(s) directed to the LCS from the client device via the external fabric, it provides instruction(s) to at least one of the resource devices via the internal fabric that are based on the LCS communication and that are configured to cause the at least one of the resource devices to perform function(s) for the LCS.

Client isolation internal/external fabric LCS provisioning system

An information handling system for compressing data includes multiple compression engines, a source data buffer to provide compression data to the compression engines, at least one destination data buffer to receive compressed data from the compression engines, and a compression engine driver. Each compression engine is configured to provide a different compression function. The compression engine driver directs each compression engine to compress data from the source data buffer, and retrieves select compressed data from a first one of the compression engines from the at least one destination data buffer. The selection is based upon a selection criterion.

System and method to improve data compression ratios for fixed block sizes in a smart data accelerator interface device

An intra-chassis device multi-management domain system includes a chassis housing a host processing system connected to first device(s), a secondary processing system connected to second device(s), and a management system connected to the first and second device(s). The management system may receive a first request for management access including first management domain access credentials, determine that the first management domain access credentials allow first access to a host domain associated with the host processing system and, in response, provide the first access to the first device(s) connected to the host processing system. The management system may also receive a second request for management access that includes second management domain access credentials, determine that the second management domain access credentials allow second access to a secondary domain associated with the secondary processing system and, in response, provide the second access to the second device(s) connected to the secondary processing system.

Intra-chassis device multi-management domain system

A secondary processor device ownership system includes a chassis that houses a plurality of devices, a secondary processing system, and a central processing system that includes an integrated switch device that is coupled to each of the plurality of devices and the secondary processing system. The central processing system is configured to provide a device ownership subsystem that configures the central processing system to own a first subset of the plurality of devices, configures the secondary processing system to own a second subset of the plurality of devices, and hides the second subset of the plurality of devices from at least one application provided by the central processing system.

Secondary processor device ownership system

An SCP data mirroring system includes a chassis housing a central processing system and an SCP subsystem. The SCP subsystem includes an SCP memory system with different priority storage queues each storing a copy of data provided by the central processing system, along with an SCP communication system and an SCP data storage subsystem. During a first time period, the SCP data storage subsystem retrieves a first copy of the data from a first storage queue in the SCP memory system and transmits it via the SCP communication system and through a network for storage on first storage device(s). During a subsequent second time period, the SCP data storage system retrieves a second copy of the data from a lower priority second storage queue in the SCP memory system and transmits it via the SCP communication system and through the network for storage on second storage device(s).

System control processor data mirroring system

An SCP power unavailability data storage system includes a chassis housing a power system, a central processing system, and an SCP subsystem that are coupled together. The SCP subsystem includes a volatile SCP memory system storing data provided by the central processing system, an SCP processing system coupled to the volatile SCP memory system, and an SCP communication system that, when power is unavailable from the power system, utilizes power received via its data/power port(s) and provides that power to the volatile SCP memory system and the SCP processing system. An SCP data storage engine provided by the SCP processing system will, in response to an unavailability of power from the power system, operate using power received via the data/power port(s), retrieve data stored in the volatile SCP memory system, and transmit the data via port(s) on the SCP communication system and through a network for storage on storage device(s).

System control processor power unavailability data storage system

An information handling system includes a publisher device and an offload device. Multiple subscriber devices are associated with the publisher device. The offload device communicates with the publisher device. The offload device receives a packet transmission from the publisher device, and translates a topic address of the packet transmission to multiple destination addresses. The offload device sends the packet transmission to each of the subscriber devices. Each of the subscriber devices is associated with a corresponding destination address of the multiple destination address. The offload device receives one or more acknowledgements from the subscriber devices, and combines the one or more acknowledgements into a composite completion message. The offload device sends the composite completion message to the publisher device.

System and method to offload point to multipoint transmissions

A secondary processor device ownership assignment system includes a chassis that houses devices, a secondary processing system, a central processing system that includes an integrated switch device that is coupled to each of the devices and the secondary processing system, and a device ownership subsystem that is coupled to the central processing system. The device ownership system accesses device information for a subset of the devices that will be owned by the secondary processing system, and configures the device information for the subset of the devices such that the subset of the devices are hidden from an operating system provided by the central processing system. The secondary processing system reconfigures the device information for the subset of the plurality of devices such that the subset of the plurality of devices are accessible by the secondary processing system.

Secondary processor device ownership assignment system

An information handling system for compressing data includes a data storage device and a processor. The data storage device stores a dictionary and an uncompressed data block. The processor prepends the dictionary to the uncompressed data block, determines, from the uncompressed data block, a literal data string and a match data string where the match data string is a matching entry of the dictionary, and compresses the uncompressed data block into a compressed data block that includes the literal data string and an offset pointer that points to the matching entry.

System and method to use dictionaries in LZ4 block format compression

An information handling system includes a processor that detects a cache flush request of a memory device within the processor, and identifies multiple blocks of data within an address space associated with the cache flush request. The processor groups the multiple blocks of data into a single composite block of data, and compresses the composite block of data. The processor stores the compressed composite block of data, and stores metadata for the compressed composite block of data. The metadata includes information for both the composite block of data and information for each of the multiple blocks of data.

System and method to utilize a composite block of data during compression of data blocks of fixed size

An information handling system includes a compression client, a memory, and a SDXI hardware module. The compression client issues a compression request for a block of data that is uncompressed. The memory has multiple storage locations identified by addresses, which include a source address and a destination address. The SDXI hardware module performs compression of the block of data to create compressed data of the block of data. The SDXI hardware module determines whether an amount of the compression of the block of data is less than a threshold amount of compression. In response to the amount of the compression being less than the threshold amount of compression, the SDXI hardware module disregards the compressed data of the block of data, and utilizes the uncompressed block of data in a source address. The SDXI hardware module updates metadata for the block of data to indicate that data returned to compression client is uncompressed.

System and method to handle uncompressible data with a compression accelerator

An information handling system includes a first memory with a video framebuffer, which in turn includes a regular video framebuffer and a diagnostic video framebuffer. Detected errors within the information handling system are stored within the diagnostic video framebuffer. In response to the error log data being stored within the diagnostic video framebuffer, a processing unit provides a notification signal. In response to the notification signal, a baseboard management controller reads the error log data from the diagnostic framebuffer, and stores the error log data in a second memory of the baseboard management controller.

System and method for transferring diagnostic data via a framebuffer

A hardware accelerator device detects duplicate data blocks independently from a processor of an information handling system. The device includes an interface, a hash function, a bloom filter, and a data comparator. The interface receives data blocks. The hash function determines a hash of a received data block. The bloom filter includes comparison hashes, each associated with a comparison data block. The bloom filter determines if the hash matches a comparison hash. The data comparator directs the interface to receive the comparison block when the hash matches the comparison hash, and compares the received data block with the comparison data block to determine if they are identical. The device stores a pointer when the data comparison block determines that the blocks are identical.

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Cedar Park, TX, United States of America

Andrew Butcher