Infineon Technologies Ag

Infineon Technologies Austria Ag

Andres Quintero Alonso

Luis Hernandez-Corporales

Andreas Wiesbauer

Carlos Andres Perez Cruz

Cesare Buffa

Fernando Cardes Garcia

Luis Hernandez

Christian Reindl

Pedro Augusto Borrego Lambin Torres Amaral

Ruben Garvi Jimenez-Ortiz

Francois Marie Leger

Bernhard Kuttin

Guillermo Alejandro Lopez Fernandez

A voltage-controlled oscillator analog-to-digital converter (VCO-ADC) includes a first source follower coupled between a first input terminal and a first internal node; a first VCO having an input coupled to a second internal node; a first variable resistor coupled between the first internal node and the second internal node; and a digital signal processing component coupled between an output of the first VCO and a output terminal.

Power and signal-to-noise ratio regulation in a VCO-ADC

An analog-to-digital converter includes a voltage-controlled oscillator (VCO) having an input for receiving an analog input signal; a double binary counter having a first input coupled to a first output of the VCO, a second input coupled to a second output of the VCO; a first set of registers coupled to the first output of the double binary counter; a second set of registers coupled to the second output of the double binary counter; sense amplifiers coupled to the outputs of the VCO; and a correction component coupled to the first set of registers, the second set of registers, and the sense amplifiers, wherein the correction component generates a coarse count, a fine count, and combines the coarse count and the fine count to provide a digital output signal representative of the analog input signal.

Coarse-fine counting architecture for a VCO-ADC based on interlocked binary asynchronous counters

A controlled oscillator Analog-to-Digital Converter (ADC) includes an analog interface configured for receiving an analog differential input signal, and configured for providing a differential control signal; first and second controlled oscillators configured for receiving the differential control signal; and a frequency-to-digital converter having a first input coupled to an output of the first controlled oscillator, a second input coupled to an output of the second controlled oscillator, and an output for providing a digital output signal proportional to the analog differential input signal, wherein the analog interface or at least one of the first and second controlled oscillators is configured for receiving at least one disturb signal to prevent locking between the first and second controlled oscillators.

Offset switching to prevent locking in controlled oscillator analog-to-digital converters

An analog-to-digital converter includes a ring oscillator having an input for receiving an analog signal, a coarse counter including a maximum length sequence generator having an input coupled to the output of the ring oscillator, a fine counter including a Johnson counter having an input coupled to the output of the ring oscillator, and a difference generator having a first input coupled to the output of the coarse counter, a second input coupled to the output of the fine counter, and an output for providing a digital signal corresponding to the analog signal.

Voltage controlled oscillator based analog-to-digital converter including a maximum length sequence generator

An analog-to-digital converter includes a ring oscillator having an input for receiving an analog signal, a coarse Gray code counter having a first input coupled to a first output of the ring oscillator and a second input for receiving a clock signal, a fine counter having first inputs coupled to secondary outputs of the ring oscillator and a second input for receiving the clock signal, a first difference generator having an input coupled to the output of the coarse counter, a second difference generator having an input coupled to the output of the fine counter, and an adder having a first input coupled to the output of the first difference generator, a second input coupled to the output of the second difference generator, and an output for providing a digital signal corresponding to the analog signal.

Coarse-fine quantization architecture for multiphase VCO-based ADCs

In various embodiments, a circuit is provided. The circuit includes: a voltage biasing circuit coupled to a microelectro-mechanical system (MEMS) microphone sensor, the MEMS microphone sensor coupled to a driver circuit, and the driver circuit coupled to an oscillator-based ADC circuit. The oscillator-based ADC circuit may include an Nth order sigma-delta modulator, where N is an integer equal to or greater than 1.

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Leganés, Spain

Andres Quintero Alonso