Arm Limited

Andrei Kapustin

Vladimir Vasekin

Stuart David Biles

Yuri Levdik

Yuri Ledvik

A data processing system is provided with breakpoint circuitry having breakpoint registers which can specify a variety of different types of breakpoint conditions. These breakpoint conditions include register access breakpoints which are triggered when an access is made to either a general purpose register or a configuration register. The breakpoints can also include input/output port access breakpoints which are triggered when an access is made to a predetermined one of a plurality of input/output ports by an appropriate program instruction or in another way.

Breakpointing on register access events or I/O port access events

A branch prediction mechanismwithin a multithreaded processor having hardware scheduling logicuses a shared global history tablewhich is indexed by respective branch history registersfor each program thread. Different mappings are used between preceding branch behavior and the prediction value stored within respective branch history registers. These different mappings may be provided by inverters placed into the shift in paths for the branch history registersor by addersor in some other way. The different mappings help to equalise the probability of use of the particular storage locations within the global history tablesuch that the plurality of program threads are not competing excessively for the same storage locations corresponding to the more commonly occurring patterns of preceding branch behavior.

Growing community of inventors

Cambridge, United Kingdom

Andrei Kapustin