Austriamicrosystems Ag

Ams Ag

Andreas Wiesner

Gregor Schatzberger

A memory arrangement comprises a first memory transistor () for non-volatile storage of a first bit, a second memory transistor () for non-volatile storage of the first bit in inverted form, and a word line () that is connected to a control terminal () of the first memory transistor () and a control terminal () of the second memory transistor (). The memory arrangement further comprises a read amplifier () with a first input () that is coupled to the first memory transistor () for supplying a first bit line signal (BL), a second input () that is coupled to the second memory transistor () for supplying a second bit line signal (BL), and an output () for provision of an output signal (SOUT) as a function of the first bit line signal (BL) and the second bit line signal (BL).

Memory array and storage method

In one embodiment, a circuit arrangement with a column latch has a first terminal (A) for connection to a bit line (BL) of a nonvolatile memory, a second terminal (A) connected via a first switchable path (P) to a reference-potential terminal (VSS) and via a second switchable path (P) to a supply-potential terminal (VPP), and the column latch (), which is coupled to the second terminal (A) and is adopted for storing a potential at the second terminal (A). The first terminal (A) is coupled to the second terminal (A) via a first switchable connection (L) and via a second switchable connection (L). A method for operating a column latch is additionally disclosed.

Circuit arrangement with a column latch and method for operating a column latch

The circuit arrangement for the supply of voltage comprises a control arrangement (), a charge pump (), a comparator () and a ramp signal generator (). A power supply voltage (Vdd) can be fed to the input of the charge pump (). The input of the charge pump () is coupled to a first output () of the control arrangement (), and comprises an output () for the supply of an output voltage (VHv). A first input () of the comparator () is coupled to the output () of the charge pump (), while the output is coupled to a first input () of the control arrangement () in order to supply a comparator signal (Vc). The input of the ramp signal generator () is connected to a second output () of the control arrangement (), while its output is connected to a second input () of the comparator () in order to deliver a reference output voltage (Vref_out).

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Edelschrott, Austria

Andreas Wiesner