Rohde and Schwarz Gmbh & Co. Kg

Adjucor Gmbh

Fujitsu Technology Solutions Intellectual Property Gmbh

Fujitsu Client Computing Limited

Andreas Maier

Stephen Manuel Wildhirt

Bernhard Nitsch

Adrian Ispas

Markus Freidhof

Andrew Schaefer

Bendix Koopmann

Rainer Staude

Rudolf Häußermann

Mathias Hellwig

Angel Chen

Waldemar Felde

Kei Wieland Müller

Detlef Schlager

Johann Schweinfort

Bjorn Hofmann

Hamman De Vaal

Björn Hofmann

Rudolf HÄUSSERMANN

A device for administration of substances onto an epicardial surface of a heart includes a frame structure for at least partially encircling a circumference of the heart which is able to assume shaping, positioning, guiding and stabilizing functions. The frame structure may be coupled to a heart-shaped sleeve. A substance carrier for accommodating the substances to be administered may be coupled to the device.

Implantable device for the locationally accurate delivery and administration of substances into the pericardium or onto the surface of the heart

A signal analysis method is described. The signal analysis method includes: receiving a time-and-value discrete input signal, the input signal being associated with a signal source; determining at least one jitter component of the input signal; determining a step response based on the input signal, the step response being associated with at least the signal source; determining a counter function based on the step response, the counter function being configured to cancel error terms in a finite-time transform of the step response to frequency domain; superposing the step response and the counter function, thereby obtaining a modified step response; and transforming the modified step response to frequency domain, thereby obtaining a transfer function being associated with at least the signal source. Further, a signal analysis module for analyzing a time-and-value discrete input signal being associated with a signal source is described.

Signal analysis method and signal analysis module

A system circuit board configured to be supplied by at least one power supply unit, with an operating voltage in an operating state and a stand-by voltage in at least one stand-by state, the system circuit board includes at least one connection device for at least one extension card, wherein the connection device is configured to provide at least one first card voltage on the basis of the operating voltage; at least one switching element arranged on the system circuit board and configured to disconnect the at least one connection device from the operating voltage; and a control device arranged on the system circuit board, and configured to identify a type of a connected power supply unit and send a switching signal to the switching element depending on the identified type.

System circuit board, operating method for a system circuit board, and computer system

A jitter determination method for determining at least one jitter component of an input signal is described, wherein the input signal is generated by a signal source. The method comprises: receiving the input signal; determining a step response based on the decoded input signal, the step response being associated with at least the signal source; and determining a data dependent jitter signal based on the determined step response and based on the decoded input signal. Further, a measurement instrument is described.

Jitter determination method and measurement instrument

A jitter determination method for determining at least one jitter component of an input signal is described. The input signal is generated by a signal source, including: receiving the input signal; determining a step response based on the decoded input signal, the step response being associated with at least the signal source; and determining the at least one jitter component of the input signal based on at least one of the input signal and the determined step response. Further, a measurement instrument is described.

A clock timing recovery method for determining a clock timing of an input signal is described, wherein the input signal is generated by a signal source, comprising: receiving the input signal; determining signal edges of the input signal based on the received input signal; determining at least a first clock timing model parameter; determining at least one jitter component of the input signal; and determining a clock timing error associated with the at least one jitter component, wherein the clock timing error is determined based on the determined signal edges, the determined first clock timing model parameter and the determined jitter component. Moreover, a measurement instrument is described.

Time interval error determination method and measurement instrument

A computer system includes a client device; and a display device operationally connected to the client device, wherein the display device provides the client device with an operating energy, and the display device detects the type of the client device, and, when the client device belongs to a predefined group of client devices, provides the client device with an operating energy even if the display device enters an energy-saving mode or is switched off.

Computer system, client device and display device

The present invention relates to a processing of digitally measured signals. When sampling a measurement signal with a predetermined sampling rate, aliasing effects may occur, if a Nyquist condition is violated. For this purpose, the present invention suggests to analyze a frequency spectrum of a signal and to compare the frequency components of the spectrum with the setting of a measurement apparatus, in particular a sampling rate of the measurement apparatus. If a measurement signal comprises frequency components which may violate the Nyquist condition, an alert may be generated to adapt the set of the measurement arrangement.

Measurement apparatus and measurement method

A jitter determination method for determining at least one jitter component of a data signal is disclosed. The jitter determination method comprises the following steps:

The invention relates to a digital low frequency correction circuit and a corresponding method for correction of low frequency disturbances within a digital signal, in particular to a reduction of distortions caused by analog circuitry, such as analog signal amplifiers. The low frequency correction circuit comprises a main signal path adapted to delay a digital input signal received by a signal input terminal and at least one correction signal path including a digital correction filter adapted to filter the received digital input signal. Furthermore, an adder of the circuit is adapted to add the digital signal delayed by the main signal path and the digital signal corrected by said correction signal path to generate a digital output signal output by a signal output terminal of the circuit.

Digital low frequency correction circuit and method for reducing low frequency disturbances within a digital signal

An interface arrangement on a system board includes at least two data lines for a differential signal transmission, at least one first mounting location for at least one first connector and at least one second mounting location for at least one second connector, and a third mounting location for an integrated circuit, wherein at the at least one first mounting location the data lines are divided into first and second paths, at the at least one second mounting location, the second and first paths are joined, the third mounting location for the integrated circuit is arranged in the first path, and the at least one and second connectors can be mounted at the at least one first and second mounting locations in a first or a second position, respectively, so that signals in the data lines run via the first path or via the second path.

Interface arrangement on a system board and computer system

An interface assembly of a host system that connects a peripheral device to a USB Type-C interface has at least one supply line and at least one signaling line, wherein one from among a plurality of different power profiles can be selected by the peripheral device by applying different analog control signals to the signaling line, a signaling circuit connects to the signaling line on a side of the host system, the signaling circuit, on the basis of at least one digital control signal, produces a predetermined analog control signal assigned to the at least one digital control signal and outputs it to the peripheral device via the signaling line and the at least one digital control signal is provided via a GPIO port of a control module of a system component of the host system, and the GPIO port is controlled by a BIOS.

Interface assembly that connects a peripheral device to an interface of a host system, an electronic device and a method of signaling

A heart support system featuring a constraint sized to fit about at least a portion of an adult human heart in a living body, an expandable chamber disposed within the constraint so as to apply pressure against the heart when expanded and a connector system including a pneumatic connection port in hydraulic communication with the expandable chamber. The heart support system can include a supply unit with: a source of pressurized fluid and a pneumatic supply line extending from the pressurized fluid source. The pneumatic supply line is connectable to the pneumatic connection port.

Supporting a heart

A heart support system featuring a sleeve sized to fit about at least a portion of an adult human heart in a living body, the sleeve having an inner surface arranged to contact the heart in use and a sheath extending about and constraining the sleeve. At least one of the sheath and sleeve carry a discrete mark detectable from outside the body with the sheath and sleeve implanted within the body. The position of the support system about the heart can be determined with reference to the mark.

A method of implanting a cardiac device featuring the insertion of an inner seal member through an opening in a pericardium about a living human heart. The inner seal member has a first sealing lip disposed inside the pericardium and surrounding an aperture through the inner seal member. An outer seal member is aligned with the inner seal member. The outer seal member has a second sealing lip disposed outside the pericardium, surrounding an aperture through the outer seal member. The inner seal member is secured to the outer seal member. The firsts sealing lip is engaged against an inner surface of the pericardium. The second sealing lip is engaged against an outer surface of the pericardium. A cardiac device is inserted into the pericardium through the apertures of the inner and outer seal members.

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Munich, Germany

Andreas Maier