Telefonaktiebolaget Lm Ericsson (publ)

Flex Ltd.

Andreas Larsson

Magnus Karlsson

Torbjörn Holmberg

Magnus Mellteg

Oscar Persson

Daniel Nilsson

Mikael Appelberg

Maguns Mellteg

A circuit and method provide improved trimming of a DCR sensing circuit where a sensing element is sensitive to self-heating or having a large tolerance. The circuit includes a resistive divider circuit coupled to a sensing element. The resistive divider circuit includes a trim resistor and two test points. Prior to trimming the trim resistor, an actual resistance of the sensing element is determined. A target voltage across the trim resistor to be trimmed is calculated according to the determined sensing element resistance and a known small trim current that is to be injected into the circuit during the trimming process. This injected trim current has a low current value so there is no self-heating of the sensing element. Then, the trim resistor is trimmed while injecting this small trim current into the resistive divider circuit and the voltage across the trim resistor is monitored.

Trimming method of DCR sensing circuits

A controller includes a sampling module that samples a signal indicative of the output voltage, a filter module that filters out a ripple component of a sampled signal to generate a filtered signal, and a proportional-integral-derivative (PID) controller that generates a duty cycle control signal. The PID controller includes a first component that scales sample values of the filtered signal to generate a first component signal, a down-sampling module that generates a down-sampled signal, and a storage module that stores a value of the down-sampled signal. The PID controller also includes a second component that generates a second component signal as a product of a factor and a difference signal between each sample value in the filtered signal and stored value, a third component that scales and accumulates the down-sampled signal to generate a third component signal, and a summing module that sums the first, second and third component signals.

Switched mode power supply compensation loop

A controller, and related method, configured to generate a duty cycle control signal for controlling an output voltage of a switched mode power supply as a function of a reference signal. In one embodiment, the controller is configured to sample a signal indicative of the output voltage to generate a first sampled signal, filter out a ripple component of the first sampled signal to generate a filtered signal, and generate a feedback control signal based on the filtered signal. The controller is also configured to sample a signal indicative of an input voltage of the switched mode power supply to generate a second sampled signal, generate a feed-forward control signal based on the second sampled signal and a feed-forward reference voltage, and generate the duty cycle control signal based on the feedback control signal and the feed-forward control signal.

A controller, and related method, to control switching elements of a plurality of voltage converters of a power system. The controller receives a signal representing an operating condition that indicates a contribution of each of the plurality of voltage converters to a ripple component of an input current or an input voltage of the power system. The controller ranks the plurality of voltage converters based on the contribution of each of the plurality of voltage converters to the ripple component. The controller calculates a switching phase offset for each switching element of the plurality of voltage converters by determining a switching order for each switching element of the plurality of voltage converters based on an alternating extremum contribution to the ripple component, and arranging control signals for each switching element of the plurality of voltage converters based on the switching order.

Determination of phase offsets in a supply system having multiple switching converters

There is provided a controller for controlling an output current of a switched mode power supply, SMPS. The controller comprises a sampling module arranged to sample a signal indicative of the output current of the SMPS at a frequency higher than a switching frequency of the SMPS, and a filter module arranged to filter out a ripple component of the sampled signal. The filter module comprises: a ripple component estimation module arranged to estimate the ripple component; a moving average calculation module arranged to calculate a moving average of the sampled signal; and a subtraction module arranged to generate a filtered signal by subtracting the estimated ripple component from the sampled signal and the calculated moving average. The controller also has a switching control module arranged to generate a control signal for controlling at least one of the switching frequency and a switching duty cycle of the SMPS based on the filtered signal.

A controller () for determining a distribution of switching phases among switching elements of a power supply system The power supply system has a plurality of voltage converters, each comprising a switching element and being arranged to convert an input voltage supplied to the voltage converters to a respective output voltage by switching the switching element at a predetermined frequency. The controller () comprises a receiver () for receiving one or more signals indicative of a respective contribution from each of the voltage converters to a ripple current component of an input current of the voltage converters, and a rank determining module () configured to rank the voltage converters in order of decreasing contribution to the ripple current. The controller () further comprises a switching phase offset calculator () configured to calculate a respective switching phase offset that is to be applied for the switching element in each of the voltage converters by: (i) calculating respective phase offsets of the two highest ranked voltage converters that would minimize an input current ripple caused only by said two highest ranked voltage converters; (ii) calculating a phase offset of the next-highest ranked voltage converter that would minimize an input current ripple caused only by said next-highest ranked voltage converter and the voltage converters ranked higher than said next-highest voltage converter; and (iii) repeating step (ii) for each subsequent voltage converter in the ranking. The controller () also includes an output signal generator () configured to generate one or more output signals defining the calculated switching phase offsets to be applied to the switching of the respective switching elements.

Determination of phase offsets in a power supply system having multiple switching converters

A controller for determining switching phases among switching elements of a power supply system having voltage converters, each comprising a switching element. The controller receives signals indicative of a contribution from each converter to a ripple voltage component of an input current of the converters, and ranks the converters. The controller calculates a switching phase offset that is to be applied for the switching element by: (i) calculating phase offsets of two highest ranked converters that would minimize an input voltage ripple caused by said two highest ranked converters, (ii) calculating a phase offset of a next-highest ranked converter that would minimize an input voltage ripple caused by said next-highest ranked converter and converters ranked higher than said next-highest converter; and (iii) repeating step (ii) for each converter in the ranking. The controller generates output signals defining the calculated switching phase offsets to be applied to the switching elements.

An apparatus () for tuning a feedback loop that is arranged to regulate an output voltage (V) of a switched mode power supply, SMPS (), in accordance with a control law defined by control law parameters. The apparatus includes a natural frequency estimator () arranged to determine a respective estimate of a natural frequency of each of two zeros in a transfer function that corresponds to a model of the feedback loop. The natural frequency estimator () comprises: an output voltage deviation determining module () arranged to determine, for each of a plurality of points in a search space, wherein the coordinates of each of the points correspond to candidate values of the natural frequencies of the zeros, a deviation of the output voltage of the SMPS that occurs in response to a variation in a load current of the SMPS; and a goal function evaluation module () arranged to evaluate a goal function using the determined deviation of the output voltage of the SMPS at each of the plurality of points to obtain a measure of at least one of a size and a recovery time of the respective output voltage deviation. The natural frequency estimator () is arranged to estimate a location of a minimum of the goal function in the search space based on the evaluated values of the goal function, the location of the minimum corresponding to the natural frequencies of the zeros. The apparatus further comprises a control law parameter calculator () arranged to calculate, based on the determined estimates of the natural frequencies of the zeros, the control law parameters for tuning the feedback loop, and a feedback loop tuner () to tune the feedback loop in accordance with the calculated control law parameters.

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Kalmar, Sweden

Andreas Larsson